中国物理B ›› 2023, Vol. 32 ›› Issue (1): 18503-018503.doi: 10.1088/1674-1056/ac6dbf

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High-performance amorphous In-Ga-Zn-O thin-film transistor nonvolatile memory with a novel p-SnO/n-SnO2 heterojunction charge trapping stack

Wen Xiong(熊文)1, Jing-Yong Huo(霍景永)1, Xiao-Han Wu(吴小晗)1, Wen-Jun Liu(刘文军)1,†, David Wei Zhang(张卫)1,2, and Shi-Jin Ding(丁士进)1,2,‡   

  1. 1 State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai 200433, China;
    2 National Integrated Circuit Innovation Center, Shanghai 201203, China
  • 收稿日期:2022-01-11 修回日期:2022-03-31 接受日期:2022-05-07 出版日期:2022-12-08 发布日期:2022-12-08
  • 通讯作者: Wen-Jun Liu, Shi-Jin Ding E-mail:wjliu@fudan.edu.cn;sjding@fudan.edu.cn
  • 基金资助:
    Project supported by the National Natural Science Foundation of China (Grant No. 61874029).

High-performance amorphous In-Ga-Zn-O thin-film transistor nonvolatile memory with a novel p-SnO/n-SnO2 heterojunction charge trapping stack

Wen Xiong(熊文)1, Jing-Yong Huo(霍景永)1, Xiao-Han Wu(吴小晗)1, Wen-Jun Liu(刘文军)1,†, David Wei Zhang(张卫)1,2, and Shi-Jin Ding(丁士进)1,2,‡   

  1. 1 State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai 200433, China;
    2 National Integrated Circuit Innovation Center, Shanghai 201203, China
  • Received:2022-01-11 Revised:2022-03-31 Accepted:2022-05-07 Online:2022-12-08 Published:2022-12-08
  • Contact: Wen-Jun Liu, Shi-Jin Ding E-mail:wjliu@fudan.edu.cn;sjding@fudan.edu.cn
  • Supported by:
    Project supported by the National Natural Science Foundation of China (Grant No. 61874029).

摘要: Amorphous In-Ga-Zn-O (a-IGZO) thin-film transistor (TFT) memories with novel p-SnO/n-SnO2 heterojunction charge trapping stacks (CTSs) are investigated comparatively under a maximum fabrication temperature of 280 ℃. Compared to a single p-SnO or n-SnO2 charge trapping layer (CTL), the heterojunction CTSs can achieve electrically programmable and erasable characteristics as well as good data retention. Of the two CTSs, the tunneling layer/p-SnO/n-SnO2/blocking layer architecture demonstrates much higher program efficiency, more robust data retention, and comparably superior erase characteristics. The resulting memory window is as large as 6.66 V after programming at 13 V/1 ms and erasing at -8 V/1 ms, and the ten-year memory window is extrapolated to be 4.41 V. This is attributed to shallow traps in p-SnO and deep traps in n-SnO2, and the formation of a built-in electric field in the heterojunction.

关键词: nonvolatile memory, a-IGZO thin-film transistor (TFT), charge trapping stack, p-SnO/n-SnO2 heterojunction

Abstract: Amorphous In-Ga-Zn-O (a-IGZO) thin-film transistor (TFT) memories with novel p-SnO/n-SnO2 heterojunction charge trapping stacks (CTSs) are investigated comparatively under a maximum fabrication temperature of 280 ℃. Compared to a single p-SnO or n-SnO2 charge trapping layer (CTL), the heterojunction CTSs can achieve electrically programmable and erasable characteristics as well as good data retention. Of the two CTSs, the tunneling layer/p-SnO/n-SnO2/blocking layer architecture demonstrates much higher program efficiency, more robust data retention, and comparably superior erase characteristics. The resulting memory window is as large as 6.66 V after programming at 13 V/1 ms and erasing at -8 V/1 ms, and the ten-year memory window is extrapolated to be 4.41 V. This is attributed to shallow traps in p-SnO and deep traps in n-SnO2, and the formation of a built-in electric field in the heterojunction.

Key words: nonvolatile memory, a-IGZO thin-film transistor (TFT), charge trapping stack, p-SnO/n-SnO2 heterojunction

中图分类号:  (Microelectronics: LSI, VLSI, ULSI; integrated circuit fabrication technology)

  • 85.40.-e
85.35.-p (Nanoelectronic devices) 85.30.Tv (Field effect devices)