† Corresponding author. E-mail:
Project supported by the National Natural Science Foundation of China (Grant No. 90304190002).
A novel vertical graded source tunnel field-effect transistor (VGS-TFET) is proposed to improve device performance. By introducing a source with linearly graded component, the on-state current increases by more than two decades higher than that of the conventional GaAs TFETs without sacrificing the subthreshold swing (SS) due to the improved band-to-band tunneling efficiency. Compared with the conventional TFETs, much larger drive current range can be achieved by the proposed VGS-TFET with SS below the thermionic limitation of 60 mV/dec. Furthermore, the minimum SS about 20 mV/dec indicates its promising potential for further ultralow power applications.
The continuous success in the fourth industrial revolution including artificial intelligence and Internet of Things demands for the rapid advances in low-power semiconductor logic devices. Unfortunately, with the dimensional scaling near material and impurity distribution limits,[1,2] conventional CMOS logic is approaching fundamental limitations and the fabrication processing becomes increasingly challenging. A more problematic issue is power constraint, especially the dynamic power consumption that is proportional to the square of supply voltage (VDD), which restricts the activity and functionality possible for kinds of applications. Hence, it is an effective method to reduce the supply voltage for the Gordian knot of power consumption decrease. However, the subthreshold swing (SS) of MOSFETs cannot be reduced below 60 mV/dec at room temperature due to the Fermi tails in carrier distribution and the working mechanism of thermal electron emission, which would hinder the supply voltage scaling when a sufficiently high ratio of on-state current/off-state current (ION/IOFF) is required for noise margins and immunity.
Recently, this challenge has attracted plenty of interests in steep slope device researches.[3–8] As one of the most promising candidates in meeting the demands for low power applications, tunnel field-effect transistors (TFETs) can achieve lower SS than the thermal limitation of 60 mV/dec relying on the temperature-independent quantum band-to-band tunneling (BTBT).[9–12] However, the commercialization of TFETs is blocked by several shortcomings, such as low ION, SS degradation and ambipolar switching effect. For the Si-based TFETs,[14,15] the on-state current has been restricted due to inefficient interband tunneling in indirect semiconductors. Some studies are reported to improve on-state current by modifying structures or using narrow and direct bandgap semiconductor materials,[16–22] in which the subthreshold characteristics would be degraded simultaneously due to the increased off-state current and ambipolar tunneling, thereby leading to higher power consumption and the additional process complexity. In Ref. , a lateral graded source has been introduced in TFETs to further increase ION by the valence band modulation. However, the broken bandgap at the uniform hetero-junction would also enhance the IOFF and degenerate the SS, which suggests that such devices still need to be improved for the subthreshold and off characteristics.
In this paper, a novel vertical graded source tunnel field-effect transistor (VGS-TFET) is proposed for further improving device performance, which is studied by using the 2-D Technology Computer-Aided Design (TCAD) simulator. By employing a vertical linearly graded source to form the graded tunnel junction with the uniform channel, the proposed device is expected to achieve high ION and low IOFF simultaneously. Furthermore, small SS over a wide range of drain current is obtained as well. The optimization on a significant factor to determine the device characteristics is also discussed.
Device simulations are carried out using the 2-D TCAD simulation tools and the dynamic nonlocal path BTBT model is applied to account for the arbitrary tunneling barrier with nonuniform electrical field. The graded InmGa1 − m As source epitaxial growth would introduce the lattice strain, which would affect the band structure accordingly. For TFET devices, the influences of the band structure change including band gap width on device characteristics are contained in two key parameters of the dynamic nonlocal path BTBT model, A and B, which include the information of the energy band structure, such as the effective mass of the tunneling carrier and the material band gap width, and both of them can be obtained through the experimental data in Refs. [25,26]. Shockley–Read–Hall (SRH) recombination, drift-diffusion, doping-dependence and high-field dependence of mobility models are also included. The quantum modifications (eQuantumPotential and hQuantumPotential) with respect to the density of states of electrons and holes are used as well. The involved parameters are calibrated with Refs. [25,26]. Figure
Thanks to the introduction of the graded source, the tunnel junction becomes a graded InmGa1 − mAs/GaAs heterojunction in the VGS-TFET, which is the key to the performance boost. The simulated band diagrams of VGS-TFET, GaAs-TFET and InAs-TFET are depicted in Fig.
On the other hand, with VG increasing and the device turning on, the gate control capability over the center and bottom of the tunnel junction is also enhanced. Owing to the graded source bandgap narrowing, the tunnel distances of the VGS-TFET (Wt, graded) in the bottom region are much shorter than that of the GaAs homo-junction TFET as shown in Fig.
The transfer characteristics of the proposed InmGa1 − mAs/GaAs VGS-TFET are compared to GaAs TFET, InAs TFET and InAs/GaAs hetero-junction TFET in Fig.
Meanwhile, the wider bandgap material in the top source region effectively limiting the leakage current is also the key to guarantee the excellent subthreshold characteristic. As a result, a very high ratio of on-state current/off-state current (such as 106) of VGS-TFET can be obtained with the gate voltage just varying no more than 0.2 V in Fig.
As is expected, the proposed InmGa1 − mAs/GaAs VGS-TFET exhibits the much steeper subthreshold characteristic simultaneously and high on-state current just slightly smaller than that of the InAs/GaAs hetero-junction TFET, via the adoption of the vertical graded InmGa1 − mAs source modulating the band structures rather than the uniform narrow-gap InAs source. For the InAs/GaAs hetero-junction TFET, the tunnel current is very high due to the InAs/GaAs hetero-junction with thinner barrier for very high band-to-band tunneling generation rate. However, the hetero-junction also induces large leakage current to make the off-state worse and increase the static power consumption, which is undesirable for low-power applications. As shown in Fig.
In the proposed InmGa1 − mAs/GaAs VGS-TFET, the channel thickness is a significant parameter influencing the bandgap variation of graded source and the device characteristics. As shown in Figs.
The decrease of the variation range of In component in the vertical graded InmGa1 − mAs source means that the source would change from graded InmGa1 − mAs to pure GaAs. The bottom tunnel junction would also change from low-tunnel-barrier narrow-gap/wide-gap hetero-junction to high-tunnel-barrier GaAs homo-junction accordingly. Therefore, the turn-on voltage of whole tunnel junction would be raised as shown in Fig.
As discussed above, the proposed VGS-TFET has outstanding characteristics because of the vertical graded source, but the high quality graded hetero-epitaxy needs to be completed after a highly selective and anisotropic etching process for the vertical graded tunnel junction formation. The graded InmGa1 − mAs source epitaxial growth would introduce the dangling bonds and interface defects due to lattice mismatch between source and channel, which may bring the defect energy levels in the band gap of tunnel junction to assist carriers tunneling early. Consequently, the leakage power dissipation and the threshold voltage may be affected. However, the aim of this work is mainly to present a new idea for the performance enhancement of TFETs. Thus, more details about the reliability of VGS-TFET need further discussion in the future work yet. In addition, the material system for the VGS-TFET is not just limited to GaAs/InGaAs. The lattice-matched material systems, such as InGaAs/GaAsSb, Ge/Si and the quaternary compound InGaAsP, are also perfect for the proposed VGS-TFET structure. Thus, the study of VGS-TFET is also meaningful for the long-term development the ultro-low power logical ICs.
In summary, a novel vertical graded source TFET is studied using the TCAD simulator, which demonstrates the outstanding performance, in which the VGS-TFET can effectively enhance the on-state current to improve driving capability and to suppress the SS degradation behavior to obtain much steeper switching slope simultaneously by applying the graded source structure. Compared with conventional homo-junction TFETs, the proposed VGS-TFET can also have much larger drive current range, in which the SS is below the thermionic limit 60 mV/dec, without leakage current degradation. Therefore, the results indicate the promising potential of VGS-TFET for further ultralow power logic and other innovative applications.