A threshold voltage model of short-channel fully-depleted recessed-source/drain (Re-S/D) SOI MOSFETs with high-k dielectric

doi:10.1088/1674-1056/24/10/108505

中国物理B ›› 2015, Vol. 24 ›› Issue (10): 108505-108505.doi: 10.1088/1674-1056/24/10/108505

• INTERDISCIPLINARY PHYSICS AND RELATED AREAS OF SCIENCE AND TECHNOLOGY • 上一篇下一篇

A threshold voltage model of short-channel fully-depleted recessed-source/drain (Re-S/D) SOI MOSFETs with high-k dielectric

Gopi Krishna Saramekala^a, Sarvesh Dubey^b, Pramod Kumar Tiwari^a

a Department of Electronics and Communication Engineering, National Institute of Technology, Rourkela-769008, Odisha, India;
b Shri Ramswaroop Memorial University, Barabanki-225003, U. P., India

收稿日期:2015-02-27 修回日期:2015-05-06 出版日期:2015-10-05 发布日期:2015-10-05
基金资助:
The author, Pramod Kumar Tiwari, was supported by the Science and Engineering Research Board (SERB), Department of Science and Technology, Ministry of Human Resource and Development, Government of India under Young Scientist Research (Grant No. SB/FTP/ETA-415/2012).

A threshold voltage model of short-channel fully-depleted recessed-source/drain (Re-S/D) SOI MOSFETs with high-k dielectric

Gopi Krishna Saramekala^a, Sarvesh Dubey^b, Pramod Kumar Tiwari^a

a Department of Electronics and Communication Engineering, National Institute of Technology, Rourkela-769008, Odisha, India;
b Shri Ramswaroop Memorial University, Barabanki-225003, U. P., India

Received:2015-02-27 Revised:2015-05-06 Online:2015-10-05 Published:2015-10-05
Contact: Pramod Kumar Tiwari E-mail:tiwarip@nitrkl.ac.in
Supported by:
The author, Pramod Kumar Tiwari, was supported by the Science and Engineering Research Board (SERB), Department of Science and Technology, Ministry of Human Resource and Development, Government of India under Young Scientist Research (Grant No. SB/FTP/ETA-415/2012).

摘要/Abstract

摘要：

In this paper, a surface potential based threshold voltage model of fully-depleted (FD) recessed-source/drain (Re-S/D) silicon-on-insulator (SOI) metal-oxide semiconductor field-effect transistor (MOSFET) is presented while considering the effects of high-k gate-dielectric material induced fringing-field. The two-dimensional (2D) Poisson's equation is solved in a channel region in order to obtain the surface potential under the assumption of the parabolic potential profile in the transverse direction of the channel with appropriate boundary conditions. The accuracy of the model is verified by comparing the model's results with the 2D simulation results from ATLAS over a wide range of channel lengths and other parameters, including the dielectric constant of gate-dielectric material.

关键词: recessed-source/drain (Re-S/D), high-k gate-material, fringing field and SCEs

Abstract:

In this paper, a surface potential based threshold voltage model of fully-depleted (FD) recessed-source/drain (Re-S/D) silicon-on-insulator (SOI) metal-oxide semiconductor field-effect transistor (MOSFET) is presented while considering the effects of high-K gate-dielectric material induced fringing-field. The two-dimensional (2D) Poisson's equation is solved in a channel region in order to obtain the surface potential under the assumption of the parabolic potential profile in the transverse direction of the channel with appropriate boundary conditions. The accuracy of the model is verified by comparing the model's results with the 2D simulation results from ATLAS over a wide range of channel lengths and other parameters, including the dielectric constant of gate-dielectric material.

Key words: recessed-source/drain (Re-S/D), high-k gate-material, fringing field and SCEs

中图分类号: (Field effect devices)

85.30.Tv

85.30.De (Semiconductor-device characterization, design, and modeling)

Gopi Krishna Saramekala, Sarvesh Dubey, Pramod Kumar Tiwari. A threshold voltage model of short-channel fully-depleted recessed-source/drain (Re-S/D) SOI MOSFETs with high-k dielectric[J]. 中国物理B, 2015, 24(10): 108505-108505.

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A threshold voltage model of short-channel fully-depleted recessed-source/drain (Re-S/D) SOI MOSFETs with high-k dielectric

A threshold voltage model of short-channel fully-depleted recessed-source/drain (Re-S/D) SOI MOSFETs with high-k dielectric

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