中国物理B ›› 2010, Vol. 19 ›› Issue (3): 37303-037303.doi: 10.1088/1674-1056/19/3/037303

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A new structure and its analytical model for the vertical interface electric field of a partial-SOI high voltage device

胡盛东, 张波, 李肇基, 罗小蓉   

  1. State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China,Chengdu 610054, China
  • 收稿日期:2009-07-21 修回日期:2009-08-12 出版日期:2010-03-15 发布日期:2010-03-15
  • 基金资助:
    Project supported by the National Natural Science Foundation of China (Grant Nos.~60436030 and 60806025).

A new structure and its analytical model for the vertical interface electric field of a partial-SOI high voltage device

Hu Sheng-Dong(胡盛东)†, Zhang Bo(张波), Li Zhao-Ji(李肇基), and Luo Xiao-Rong(罗小蓉)   

  1. State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China,Chengdu 610054, China
  • Received:2009-07-21 Revised:2009-08-12 Online:2010-03-15 Published:2010-03-15
  • Supported by:
    Project supported by the National Natural Science Foundation of China (Grant Nos.~60436030 and 60806025).

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摘要： A new partial-SOI (PSOI) high voltage device structure called a CI PSOI (charge island PSOI) is proposed for the first time in this paper. The device is characterized by a charge island layer on the interface of the top silicon layer and the dielectric buried layer in which a series of equidistant high concentration n+-regions is inserted. Inversion holes resulting from the vertical electric field are located in the spacing between two neighbouring n+-regions on the interface by the force with ionized donors in the undepleted n+-regions, and therefore effectively enhance the electric field of the dielectric buried layer (EI) and increase the breakdown voltage (BV), thereby alleviating the self-heating effect (SHE) by the silicon window under the source. An analytical model of the vertical interface electric field for the CI PSOI is presented and the analytical results are in good agreement with the 2D simulation results. The BV and EI of the CI PSOI LDMOS increase to 631~V and 584~V/μ m from 246~V and 85.8~V/μ m for the conventional PSOI with a lower SHE, respectively. The effects of the structure parameters on the device characteristics are analysed for the proposed device in detail.

Abstract: A new partial-SOI (PSOI) high voltage device structure called a CI PSOI (charge island PSOI) is proposed for the first time in this paper. The device is characterized by a charge island layer on the interface of the top silicon layer and the dielectric buried layer in which a series of equidistant high concentration n+-regions is inserted. Inversion holes resulting from the vertical electric field are located in the spacing between two neighbouring n+-regions on the interface by the force with ionized donors in the undepleted n+-regions, and therefore effectively enhance the electric field of the dielectric buried layer (EI) and increase the breakdown voltage (BV), thereby alleviating the self-heating effect (SHE) by the silicon window under the source. An analytical model of the vertical interface electric field for the CI PSOI is presented and the analytical results are in good agreement with the 2D simulation results. The BV and EI of the CI PSOI LDMOS increase to 631 V and 584 V/μ m from 246 V and 85.8 V/μ m for the conventional PSOI with a lower SHE, respectively. The effects of the structure parameters on the device characteristics are analysed for the proposed device in detail.

Key words: interface charges, breakdown voltage, partial-SOI, self-heating effect

中图分类号:  (Semiconductor-device characterization, design, and modeling)

  • 85.30.De
73.40.Qv (Metal-insulator-semiconductor structures (including semiconductor-to-insulator)) 61.72.S- (Impurities in crystals)