Critical area computation for real defects and arbitrary conductor shapes

doi:10.1088/1009-1963/15/7/041

中国物理B ›› 2006, Vol. 15 ›› Issue (7): 1621-1630.doi: 10.1088/1009-1963/15/7/041

• 8000 CROSSDISCIPLINARY PHYSICS AND RELATED AREAS OF SCIENCE AND TECHNOLOGY • 上一篇下一篇

Critical area computation for real defects and arbitrary conductor shapes

王俊平, 郝跃

Microelectronics Institute, Xidian University, Xi'an 710071, China;Key Laboratory of Ministry of Education for Wide Band-Gap Semiconductor Materials and Devices, Xidian University, Xi'an 710071, China

收稿日期:2005-12-09 修回日期:2006-04-17 出版日期:2006-07-20 发布日期:2006-07-20
基金资助:
Project supported by the National High Technology Research and Development Program of China (Grant No 2003AA1Z163).

Critical area computation for real defects and arbitrary conductor shapes

Wang Jun-Ping (王俊平), Hao Yue (郝跃)

Microelectronics Institute, Xidian University, Xi'an 710071, China;Key Laboratory of Ministry of Education for Wide Band-Gap Semiconductor Materials and Devices, Xidian University, Xi'an 710071, China

Received:2005-12-09 Revised:2006-04-17 Online:2006-07-20 Published:2006-07-20
Supported by:
Project supported by the National High Technology Research and Development Program of China (Grant No 2003AA1Z163).

摘要/Abstract

摘要： In current critical area models, it is generally assumed the defect outlines are circular and the conductors to be rectangle or the merger of rectangles. However, real defects and conductors associated with optimal layout design exhibit a great variety of shapes. Based on mathematical morphology, a new critical area model is presented, which can be used to estimate the critical area of short circuit, open circuit and pinhole. Based on the new model, the efficient validity check algorithms are explored to extract critical areas of short circuit, open circuit and pinhole from layouts. The results of experiment on an approximate layout of ${4\times 4}$ shifts register show that the new model predicts the critical areas accurately. These results suggest that the proposed model and algorithm could provide new approaches for yield prediction.

Abstract: In current critical area models, it is generally assumed the defect outlines are circular and the conductors to be rectangle or the merger of rectangles. However, real defects and conductors associated with optimal layout design exhibit a great variety of shapes. Based on mathematical morphology, a new critical area model is presented, which can be used to estimate the critical area of short circuit, open circuit and pinhole. Based on the new model, the efficient validity check algorithms are explored to extract critical areas of short circuit, open circuit and pinhole from layouts. The results of experiment on an approximate layout of ${4\times 4}$ shifts register show that the new model predicts the critical areas accurately. These results suggest that the proposed model and algorithm could provide new approaches for yield prediction.

Key words: real defects, critical area model, mathematical morphology, yield estimation

中图分类号: (Computer-aided design of microcircuits; layout and modeling)

85.40.Bh

84.30.Sk (Pulse and digital circuits) 84.32.Ff (Conductors, resistors (including thermistors, varistors, and photoresistors))

王俊平, 郝跃. Critical area computation for real defects and arbitrary conductor shapes[J]. 中国物理B, 2006, 15(7): 1621-1630.

Wang Jun-Ping (王俊平), Hao Yue (郝跃). Critical area computation for real defects and arbitrary conductor shapes[J]. Chinese Physics, 2006, 15(7): 1621-1630.

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Critical area computation for real defects and arbitrary conductor shapes

Critical area computation for real defects and arbitrary conductor shapes

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