Effect of PECVD SiNx/SiOyNx–Si interface property on surface passivation of silicon wafer
Jia Xiao-Jie1, Zhou Chun-Lan1, †, , Zhu Jun-Jie2, Zhou Su1, Wang Wen-Jing1
The Key Laboratory of Solar Thermal Energy and Photovoltaic System, Institute of Electrical Engineering, Chinese Academy of Sciences, University of Chinese Academy of Sciences, Beijing 100190, China
Solar Energy Department, Institute for Energy Technology, Instituttveien 18, 2007 Kjeller, Norway

 

† Corresponding author. E-mail: zhouchl@mail.iee.ac.cn

Project supported by the National High Technology Research and Development Program of China (Grant No. 2015AA050302) and the National Natural Science Foundation of China (Grant No. 61306076).

Abstract
Abstract

It is studied in this paper that the electrical characteristics of the interface between SiOyNx/SiNx stack and silicon wafer affect silicon surface passivation. The effects of precursor flow ratio and deposition temperature of the SiOyNx layer on interface parameters, such as interface state density Dit and fixed charge Qf, and the surface passivation quality of silicon are observed. Capacitance–voltage measurements reveal that inserting a thin SiOyNx layer between the SiNx and the silicon wafer can suppress Qf in the film and Dit at the interface. The positive Qf and Dit and a high surface recombination velocity in stacks are observed to increase with the introduced oxygen and minimal hydrogen in the SiOyNx film increasing. Prepared by deposition at a low temperature and a low ratio of N2O/SiH4 flow rate, the SiOyNx/SiNx stacks result in a low effective surface recombination velocity (Seff) of 6 cm/s on a p-type 1 Ω·cm–5 Ω·cm FZ silicon wafer. The positive relationship between Seff and Dit suggests that the saturation of the interface defect is the main passivation mechanism although the field-effect passivation provided by the fixed charges also make a contribution to it.

1. Introduction

Silicon oxynitride (SiOyNx) deposited through plasma-enhanced chemical vapor deposition (PECVD) has been widely used in microelectronic and optoelectronic devices.[1] The most significant feature of SiOyNx thin film is that its composition and properties can be easily controlled by varying precursor gas-flow ratio in deposition and post-annealing process. In recent years, SiOyNx, which is usually presented in the form of SiOxNy/SiNx stacks, has shown great potential applications in various designs of the next-generation high-performance solar cells.[2] SiOyNx offers an adjustable refractive index between 1.45 and 2.1[3,4] and provides better transmission coefficient than single-layered silicon nitride (SiNx). The coefficient makes it become a multilayer antireflection coating on the front side of solar cells. Silicon solar cells become thin to reduce wafer cost; thus, there exists a stronger reliance on the surface passivation of solar cells in the efficiency of silicon solar cells. SiOyNx has a large fixed positive charge density after being annealed;[5] thus, it is an effective passivation layer for various high-performance solar cells, particularly as a rear passivation layer in passivated emitter and rear cell (PERC) solar cells.[6,7] In our previous work,[8] inserting a PECVD-deposited SiOyNx layer between the SiNx capping layer and the silicon wafer shows an increased resistance to potential-induced degradation (PID) compared with the single SiNx layer.

Thus far, extensive work has been conducted to investigate the passivation properties of SiOyNx thin films. Most of these studies are based on how the deposition parameters and the annealing methods affect the stoichiometry of thin film and influence the minority carrier lifetime. Sommer et al.[9] determined oxygen concentration increases as N2O gas dilution ratio rising, while the nitrogen remains nearly unchanged. Their observations implied that oxygen replaces hydrogen in films. This finding agreed with the report of Dupuis et al.,[10] indicating that low oxygen content sample with high hydrogen content exhibits a better surface passivation before being annealed than a sample with high oxygen content. The annealing process affects the hydrogen content in the film[11] and changes the sign of charge in the film, with a negative charge in the film before being annealed and a positive charge after being annealed.[12] However, clarifying how the electrical properties of the interface between the dielectric film and the silicon wafer affect the silicon surface passivation needs in-depth investigation.

The present study aims to examine how N2O/SiH4 gas flow ratio (R) and the deposition temperature of SiOyNx thin layer affect the SiOyNx/SiNx–stack/silicon interface and the surface passivation of silicon wafer. The interface properties are analyzed via capacitance–conductance–voltage (CGV) measurement and noncontact corona CV metrology. The passivation influence of the layer is quantified through effective minority carrier lifetime measurement using quasi-static state photo-conductance (QSSPC) method.

2. Experiment
2.1. Sample preparation

High-quality double-side-polished 1 Ω·cm–5 Ω·cm FZ p-type silicon wafers were used as substrates. The wafers experienced a standard RCA cleaning and a 1-min oxide removal process in a 1-wt% HF solution prior to PECVD processing.

The SiOyNx films were deposited on silicon wafers in a PECVD system (PlasmaLab System133) from Oxford Instruments. Silane (SiH4) and nitrous oxide (N2O) were used as precursor gases. The microwave power and the pressure were maintained at a constant value of 47 mW/cm2 and 500 mTorr (1 Torr = 1.33322 × 102 Pa), respectively. The deposition temperature varied from 35 °C to 400 °C. The R of SiH4 and N2O flow ratio, R, was controlled from 0.44 to 77.

After the deposition of SiOyNx film, the capping layer, a 70-nm SiNx film, was deposited in the same PECVD chamber. Ammonia (NH3) and SiH4 were used as precursor gases. The microwave power, the pressure, and the deposition temperature were kept at 58 mW/cm2, 800 mTorr, and 400 °C, respectively. The refractive index of the SiNx layer, which was measured via spectroscopic ellipsometry (JobinYvon UVISEL), was 2.04 at wavelength λ = 630 nm.

After the deposition of the SiOyNx/SiNx stack structure, the rapid thermal annealing (RTA) was performed on each of the samples at approximately 800 °C for 5 s. This process imitates the co-firing screen printing of Ag and Al at the end of the production of the silicon solar cells.

2.2. CGV measurement

Metal–insulator–semiconductor (MIS) structures were prepared to perform the CGV characterization. For all kinds of samples, the aluminum contact of 100 nm was thermally evaporated to produce Al/Si/SiOyNx/SiNx/Al device and Al/Si/SiNx/Al as references. The diameter of the circular gate electrode was 3 mm. Multifrequency (10 kHz to 2 MHz) CV and GV measurements were performed with a Keithley 4200 SCS using the parallel model.[13] All measurements were compensated for by a series resistance. The interface state density (Dit) in half the band gap could be extracted by combining the CV and GV tests. A noncontact CV metrology (PV2000, Semilab) was used to investigate the energy distribution of the Dit in the band gap for post-RTA sample.[14]

2.3. Effective minority carrier lifetime

The effective minority carrier lifetime (τeff) of p-type silicon wafer that was double-side coated with the SiOyNx/SiNx stacks was observed. A silicon wafer that was double-side coated with the single 100-nm-thick SiNx film was used as reference. QSSPC measurements (Sinton Instruments lifetime tester) were performed with the optical constant as “1- reflection index” at an injection level of Δn = 7 × 1014 cm-3. The effective surface recombination velocity (Seff) can be calculated from[15]

where W is the thickness of the wafer. A minority carrier lifetime of 3 ms for p-type wafer with a resistance of 1.37 Ω·cm was obtained through high-quality intrinsic a-Si passivation. For wafers that have similar resistances, this is the lower limit to the bulk lifetime, which approximately could be taken as the bulk minority carrier lifetime τb = 3 ms.

3. Result and discussion
3.1. CV characteristic of SiOxNy/SiNx stacks

The multifrequency CGV characteristics of one of the post-RTA SiOxNy/SiNx stack samples are shown in Fig. 1. The regions of accumulation, depletion, and inversion are clearly shown, thereby verifying a typical metal–oxide–semiconductor (MOS) behavior. No dependence on the frequency of CV curve is observed in the accumulation because the the device structure is automatically compensated for by a series resistance during the measurement. However, the CV curve is stretched out at the low frequency in depletion possibly because of the capacitive response of the interface states of dielectrics/Si to the measurement frequency.[16] The distinctive peaks of the G/ωV curves are shown in this region, thereby indicating the presence of interface-trapped charges.[17] These distinctive peaks are correspondingly helpful to analyze the electrical responses of interface defect states to different frequencies. Moreover, at 40 kHz the G/ωV curve reaches a highest G/ωV peak, which is used for CGV measurement to obtain Dit information.

Fig. 1. Multifrequency (10 kHz to 1 MHz) CGV characteristics of an MIS capacitor utilizing post-RTA SiOyNx/SiNx stacks. (a) The CV curves were measured in inversion–accumulation direction. (b) The peaks of G/ωV curves lie in the range of depletion.

The varying N2O/SiH4 gas flow ratio (R) changes the Si, O, and N concentrations in the SiOyNx layer. The hysteresis formation of the SiOyNx (30 nm)/SiNx (70 nm) stacks is measured using inversion–accumulation–inversion complete circles as shown in Fig. 2. From Figs. 2(a) to 2(e), the R varies from 77 to 0.44; R = 77 means that the film is basically the SiOy layer measured via the Fourier transform infrared (FTIR) spectroscopy (not shown in this paper). The result of the single SiNx (100 nm) layer (f) is also shown for reference.

Fig. 2. Compositions of the SiOyNx layer of the SiOyNx (30 nm) / SiNx (70 nm) stacks influence the hysteresis in CV curves. The complete measurement circle is inversion–accumulation–inversion. In the SiOy/SiNx stacks, (a) R = 77. In the SiOyNx/SiNxstacks, (b) R = 11.11, (c) R = 1.54, (d) R = 0.83, and (e) R = 0.54. The reference is (f) the single SiNx (100 nm) layer.

The largest hysteresis is observed in the sample with only a single SiNx layer at ΔVFB = 13 V. For PECVD-prepared SiNx film, the hysteresis of the Si-rich film with numerous Si dangling bonds is larger than that of the N-rich film.[18] The SiOyNx films deposited with low R values of 0.44 and 0.83 each show a counter-clockwise hysteresis formation, which can be interpreted by the following hole-trapping mechanism:[19] High-density hole trapping sites possibly exist at the interface. These trapping sites can be filled with majority carrier holes at the accumulation state when voltage sweeping is applied from inversion to accumulation. Therefore, the excess positive charge trapped at the interface can make the flat voltage (VFB) shift to a negative applied bias voltage when voltage sweeping is applied from accumulation back to inversion. The VFB is affected by the applied bias sweep range and by its history, and the injected charges generate hysteresis during the CV measurements, thereby leading to the shift of the VFB. For instance, the hysteresis effect of the single SiNx layer is reduced by inserting a SiOyNx layer at R = 0.83, thereby making the ΔVFB decrease to 2.5 V. This observation indicates the reduction of the trap state density existing in the stacks.

The hysteresis effect changes the feature from counter-clockwise to clockwise direction when R is increased up to a value of 1.54 (ΔVFB = 1 V). The hysteresis effect leads to a counter-clockwise feature in SiNx[20] and a clockwise feature in SiO2.[21] The former indicates the hole trapping at the negative bias, whereas the latter shows the electron trapping. This observation implies that the increase of R results in the change of the charge-trapping center in stacks from the nitrogen-related (similar to SiNx films) to the oxygen-related silicon dangling bonds (similar SiO2 films).

The R also affects the energy distribution of the Dit in the band gap. The variations of measured Dit with energy level in the band gap of post-RTA SiOyNx (10 nm)/SiNx (70 nm) stacks for different N2O:SiH4 ratios are shown in Fig. 3. The Dit distribution curves each have a nearly symmetrical U shape, and the minimum value is reached near the mid-gap. For stacks, the minimum value of Dit in the mid-gap rises as the R increases from 6.5 × 1011 eV−1·cm−2 at R = 0.44 to 7.9 × 1011 eV−1·cm−2 at R = 77. The Dit of the single SiNx layer in the mid-gap is 2.4 × 1012 eV−1·cm−2, which is one order of magnitude higher than that of SiNx layer in the stacks. The N–H bonds in the SiOyNx films are considerably less than those in the SiNx films. However, the increase of R (i.e., more oxygen content is introduced into the SiOyNx film) results in the increase of the N–H bonds with the decrease of Si–H bonds.[20] Previous results show that the N–H bonds in films are inferior to Si–H bonds for silicon surface passivation.[22] Consequently, the more oxygen content incorporated in the SiOyNx layer significantly affects the passivation quality of the interface. If a small oxygen content is introduced into the dielectric layer, low N–H bond density results in decreases of Dit and Qf compared with the case of less oxygen content incorporated into the single SiNx layer.[22] However, an increased oxygen content is incorporated into the dielectric layer; thus, the decrease of the Si–H bond density and the increase of the N-H bond density result in forming numerous oxygen-related silicon dangling bonds, such as N≡Si·, N2O≡Si·, NO2≡Si·, and O≡Si·.[23]

Fig. 3. Energy distribution of Dit in the band gap for the post-RTA SiOyNx (10 nm)/SiNx (70 nm) stacks with the single SiNx (100 nm) layer as reference. The SiOyNx layers are deposited at different R values with the deposition temperature of 130 °C.

The effect of the deposition temperature on the electrical properties of the interface between the SiOyNx/SiNx stacks and the Si substrate is studied. The Dit and Qf of the stacks and the single SiNx layer-coated silicon wafers are summarized in Fig. 4. The Dit of the SiOyNx/SiNx stacks increases with the increase of deposition temperature: it increases from 2.3 × 1010 eV−1·cm−2 at 100 °C to 2.9 × 1011 eV−1·cm−2 at 400 °C. The Dit of the single SiNx layer is 4.7 × 1011 eV−1·cm−2 in a typical range from 1 × 1011 eV−1·cm−2 to 5 × 1012 eV−1·cm−2, which was reported by Aberle.[24] The Qf of the SiOyNx/SiNx stacks rises with deposition temperature increasing from 1 × 1012 cm−2 at 100 °C to 2.1 × 1012 cm−2 at 400 °C. The Qf of the single SiNx layer is 2.5 × 1012 cm−2, which is larger than that in the SiOyNx/SiNx stacks. In their stable form N3≡Si+ (K+ centers), the K centers contribute primarily to the fixed positive charges in the SiNx films.[25] These fixed positive charges are situated in a 20-nm interface layer between the dielectric and the Si substrate.[23] The stacks present lower Qf and Dit than the reference sample (100-nm SiNx-coated silicon). This observation illustrates that the reduction of the structure defect at the SiOyNx/Si interface or in film results from the effect of O atom incorporation during deposition and annealing.

Fig. 4. Summary of the electrical parameters of the SiOyNx (30 nm)/SiNx (70 nm) stacks, including Qf and Dit, with the single SiNx (100 nm) film as reference. The SiOyNx layers are deposited at different deposition temperatures of 100 °C–400 °C, with R = 1.54.
3.2. Surface passivation properties on silicon wafers

The Seff of the SiOyNx (30 nm)/SiNx (70 nm) stacks is obtained through the QSSPC measurement at an injection level of Δn = 7 × 1014 cm−3. The effect of the N2O/SiH4 gas flow ratio (R) is presented in Fig. 5 using the single SiNx (80 nm) layer as reference. The Seff of the single SiNx layer is 71 cm/s. For SiOyNx/SiNx stacks, the Seff increases from 6 cm/s to 700 cm/s as R increases from 0.44 to 77. In addition, the Seff is approximately 1000 cm/s on the entire surface of an “O-rich” sample, for instance, when R is above 10. The highest Seff = 2360 cm/s is obtained at R = 15.56. In this condition, the film is basically the SiOx layer measured by FTIR spectroscopy (not shown in this paper). In a range of R = 0.44–1.54 (refractive index: 2.1–1.6), the Seff increases from 6 cm/s at R = 0.44 to 35 cm/s at R = 1.54. All values are lower than those in the cases of single SiNx coating. Therefore, good passivation properties are clearly obtained when the SiOyNx layer, not the SiOx, is introduced as the passivation layer.

Fig. 5. Seff of the post-RTA SiOyNx (30 nm)/SiNx (70 nm) stacks at an injection level of Δn = 7 × 1014 cm−3 through QSSPC with the single SiNx (80 nm) layer as reference. The SiOyNx layer is deposited at different R values with the deposition temperature of 300 °C.

The effect of the deposition temperature is presented in Fig. 6. The Seff increases from 6 cm/s to 70 cm/s as deposition temperature increases from 100 °C to 400 °C for sample deposited with R = 1.54. Good passivation properties are clearly obtained when the SiOyNx deposition is conducted at a low temperature. Numerous Si–O bonds are introduced into the films as the deposition temperature increases,[26] thereby creating many oxygen-related defects at the interface. The total H content decreases when the deposition temperature increases, thereby resulting in many non-passivated defects in the film and at the interface, and leading to the increases of Qf and Dit (as shown in Fig. 4). Figure 4 shows that the Dit significantly increases as deposition temperature increases; however, Qf exhibits a slight change: it increases from 1 × 1012 cm−2 when the deposition temperature is 100 °C to 2.1 × 1012 cm−2 when the deposition temperature is 400 °C. The combination of the relationship among Seff, Dit, and Qf with the deposition temperature shows that the surface passivation is influenced mainly by the interface state (chemical passivation). High Qf provides a certain degree of field-effect passivation; however, high Dit induces the increase of Seff with deposition temperature rising because of poor chemical passivation. According to the preceding result, the optimized deposition parameter for the SiOyNx film is obtained at a low deposition temperature and a low ratio of N2O/SiH4 flow rate.

Fig. 6. Seff of the post-RTA SiOyNx (30 nm)/SiNx (70 nm) stacks at a corona charge injection level of Δn = 7 × 1014 cm−3 through QSSPC. The SiOyNx layer is deposited at different deposition temperatures, with R = 1.54.
4. Conclusions

Low interface state density (Dit) and fixed charge density (Qf) are obtained after a thin SiOyNx layer has been inserted between the capping SiNx layer and the silicon wafer. The small hysteresis for stack in CV curve indicates that there exists a lower charge-trapping state density in the stack than that in the single SiNx film. Other oxygen-related defects are induced in the films by increasing the O content and minimizing H content in the SiOyNx films as R increases. The minimum value of Dit in the energy distribution of the sample with a stack rises with the increase of R by one order of magnitude lower than the one with a single SiNx layer. The Seff varies from 6 cm/s to 35 cm/s as R increases from 0.44 to 1.54. This Seff is lower than the Seff (71 cm/s) of the single SiNx layer. The minimum value of Dit of the stack in the band gap rises with the deposition temperature increasing in a range from 100 °C to 400 °C. Good passivation properties, such as Seff = 6 cm/s, are obtained at low deposition temperature. The correlation between Dit and Seff indicates that although the field-effect passivation may contribute to the passivation of the silicon surface, the chemical passivation from the stack dominates the entire passivation process.

Reference
1Liao J HHsieh J YLin H JTang W YChiang C LLo Y SWu T BYang L WYang TChen K C 2009 J. Phys. D: Appl. Phys. 42 175102
2Laades ABlech MBiank H CMaier CRoczen MLeschinski CStrutzberg HLawrenz A2011Proceedings of the 26th EUPVSECSeptember 5–8 2011Hamburg, Germany1653
3Huang C SHuang C JChen C TLin S CKuo L C2002In Photovoltaic Specialists Conference, Conference Record of the Twenty-Ninth IEEENew York, USA469
4del Prado ASan Andres EMartinez F LMartil IGonzalez-Diaz GBohne WRohrich JSelle BFernandez M 2002 Vacuum 67 507
5Lee D YLee H HAhn J YPark H JKim J HKwon H JJeong J W 2011 Sol. Energy Mater. Sol. Cells 95 26
6Seiffe JGautero LHofmann MRentsch JPreu RWeber SEichel R A 2011 J. Appl. Phys. 109 034105
7Mueller TSchwertheim SFahrner W R 2010 J. Appl. Phys. 107 014504
8Zhou CZhu JFoss S EHaug HNordseth ØMarstein E SWang W 2015 Energy Procedia 77 434
9Sommer DBrinkmann NMicard GHahn GTerheiden B201227th European Photovoltaic Solar Energy Conference and Exhibition2012879
10Dupuis JFourmond ELelièvre J FBallutaud DLemiti M 2008 Thin Solid Films 516 6954
11Hallam BTjahjono BWenham S 2012 Sol. Energy Mater. Sol. Cells 96 173
12del Prado ASan Andrés EMártil IGonzález-Díaz GKliefoth KFüssel W 2004 Semicond. Sci. Technol. 19 133
13Hill W AColeman C C 1980 Solid-State Electron. 23 987
14Cost S1996Microelectron. J.274
15Cuevas AMacdonald D 2004 Solar Energy 76 255
16Lundgren PAndersson M OFarmer K R 1993 J. Appl. Phys. 74 4780
17Konofaos NEvangelou E KAslanoglou XKokkoris MVlastou R 2004 Semicond. Sci. Technol. 19 50
18Martınez F LSan Andrés EDel Prado AMártil IBravo DLópez F J 2001 J. Appl. Phys. 90 1574
19Perera RIkeda AHattori RKuroki Y 2003 Thin Solid Films 423 212
20Brews J RNicollian E H1982MOS Physics and Technology
21Warren W LFleetwood D MSchwank J RShaneyfelt M RDraper B LWinokur P SKnoll M GVanheusden KDevine R A BArcher L B 1997 Nucl. Sci. 44 1789
22Prabhakaran KKobayashi YOgino T1998Appl. Surf. Sci.130182
23Aberle A G 2001 Sol. Energy Mater. Sol. Cells 65 239
24Aberle A GCenter for Photovoltaic Engineering, University of New South Wales1999
25Robertson JWarren W LKanicki J. 1995 J. Non-Cryst. Solids 187 297
26Zhu J JZhou SHuang HMarstein E SFoss S EWang W J2014Proc. 29th European Photovoltaic Solar Energy Conference and ExhibitionAmsterdam, Nederland1100