关键词: MOSFET, split gate, dummy gate, turn-off, and reverse recovery

Abstract: A power MOSFET with integrated split gate and dummy gate (SD-MOS) is proposed and demonstrated by the TCAD SENTAURUS. The split gate is surrounded by the source and shielded by the dummy gate. Consequently, the coupling area between the split gate and the drain electrode is reduced, thus the gate-to-drain charge ($Q_{\rm GD}$), reverse transfer capacitance ($C_{\rm RSS}$) and turn-off loss ($E_{\rm off}$) are significantly decreased. Moreover, the MOS-channel diode is controlled by the dummy gate with ultra-thin gate oxide $t_{\rm ox}$, which can be turned on before the parasitic P-base/N-drift diode at the reverse conduction, then the majority carriers are injected to the N-drift to attenuate the minority injection. Therefore, the reverse recovery charge ($Q_{\rm RR}$), time ($T_{\rm RR}$) and peak current ($I_{\rm RRM}$) are effectively reduced at the reverse freewheeling state. Additionally, the specific on-resistance ($R_{\rm on,sp}$) and breakdown voltage ($BV$) are also studied to evaluate the static properties of the proposed SD-MOS. The simulation results show that the $Q_{\rm GD}$ of 6 nC/cm$^{2}$, the $C_{\rm RSS}$ of 1.1 pF/cm$^{2}$ at the $V_{\rm DS}$ of 150 V, the $Q_{\rm RR}$ of 1.2 μC/cm$^{2}$ and the $R_{\rm on,sp}$ of 8.4 m$\Omega \cdot$cm$^{2}$ are obtained, thus the figures of merit (FOM) including $Q_{\rm GD} \times R_{\rm on,sp}$ of 50 nC$\cdot$m$\Omega $, $E_{\rm off} \times R_{\rm on,sp}$ of 0.59 mJ$\cdot$m$\Omega $ and the $Q_{\rm RR} \times R_{\rm on,sp}$ of 10.1 μC$\cdot$m$\Omega $ are achieved for the proposed SD-MOS.

Key words: MOSFET, split gate, dummy gate, turn-off, and reverse recovery