中国物理B ›› 2007, Vol. 16 ›› Issue (6): 1743-1747.doi: 10.1088/1009-1963/16/6/044

• CONDENSED MATTER: ELECTRONIC STRUCTURE, ELECTRICAL, MAGNETIC, AND OPTICAL PROPERTIES • 上一篇    下一篇

Tradeoff between speed and static power dissipation of ultra-thin body SOI MOSFETs

田豫, 黄如, 张兴, 王阳元   

  1. Institute of Microelectronics, Peking University, Beijing 100871, China
  • 收稿日期:2006-09-06 修回日期:2007-01-05 出版日期:2007-06-20 发布日期:2007-06-20
  • 基金资助:
    Project supported by the National Natural Science Foundation of China (Grant No~60625403), the State Key Development Program for Basic Research of China (Grant No~2006CB302701).

Tradeoff between speed and static power dissipation of ultra-thin body SOI MOSFETs

Tian Yu(田豫), Huang Ru(黄如)† , Zhang Xing(张兴), and Wang Yang-Yuan(王阳元)   

  1. Institute of Microelectronics, Peking University, Beijing 100871, China
  • Received:2006-09-06 Revised:2007-01-05 Online:2007-06-20 Published:2007-06-20
  • Supported by:
    Project supported by the National Natural Science Foundation of China (Grant No~60625403), the State Key Development Program for Basic Research of China (Grant No~2006CB302701).

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摘要： The speed performance and static power dissipation of the ultra-thin-body (UTB) MOSFETs have been comprehensively investigated, with both DC and AC behaviours considered. Source/drain extension width ($L_{\rm sp})$ and silicon film thickness $(t_{\rm si})$ are two independent parameters that influence the speed and static power dissipation of UTB silicon-on-insulator (SOI) MOSFETs respectively, which can result in great design flexibility. Based on the different effects of physical and geometric parameters on device characteristics, a method to alleviate the contradiction between power dissipated and speed of UTB SOI MOSFETs is proposed. The optimal design regions of $t_{\rm si}$ and $L_{\rm sp}$ for low operating power and high performance logic applications are given, which may shed light on the design of UTB SOI MOSFETs.

Abstract: The speed performance and static power dissipation of the ultra-thin-body (UTB) MOSFETs have been comprehensively investigated, with both DC and AC behaviours considered. Source/drain extension width ($L_{\rm sp})$ and silicon film thickness $(t_{\rm si})$ are two independent parameters that influence the speed and static power dissipation of UTB silicon-on-insulator (SOI) MOSFETs respectively, which can result in great design flexibility. Based on the different effects of physical and geometric parameters on device characteristics, a method to alleviate the contradiction between power dissipated and speed of UTB SOI MOSFETs is proposed. The optimal design regions of $t_{\rm si}$ and $L_{\rm sp}$ for low operating power and high performance logic applications are given, which may shed light on the design of UTB SOI MOSFETs.

Key words: ultra-thin-body, SOI, MOSFET, simulation

中图分类号:  (Field effect devices)

  • 85.30.Tv
73.40.Qv (Metal-insulator-semiconductor structures (including semiconductor-to-insulator)) 85.30.De (Semiconductor-device characterization, design, and modeling)