Enhancement of holding voltage by a modified low-voltage trigger silicon-controlled rectifier structure for electrostatic discharge protection

doi:10.1088/1674-1056/ac7b1d

中国物理B ›› 2023, Vol. 32 ›› Issue (2): 28502-028502.doi: 10.1088/1674-1056/ac7b1d

Enhancement of holding voltage by a modified low-voltage trigger silicon-controlled rectifier structure for electrostatic discharge protection

Yuankang Chen(陈远康), Yuanliang Zhou(周远良), Jie Jiang(蒋杰), Tingke Rao(饶庭柯), Wugang Liao(廖武刚)^†, and Junjie Liu(刘俊杰)

College of Electronics and Information Engineering, Shenzhen University, Shenzhen 518060, China

收稿日期:2022-03-26 修回日期:2022-06-17 接受日期:2022-06-22 出版日期:2023-01-10 发布日期:2023-01-10
通讯作者: Wugang Liao E-mail:wgliao@szu.edu.cn
基金资助:
Project supported by the National Natural Science Foundation of China (Grant No. 61904110)

Enhancement of holding voltage by a modified low-voltage trigger silicon-controlled rectifier structure for electrostatic discharge protection

Yuankang Chen(陈远康), Yuanliang Zhou(周远良), Jie Jiang(蒋杰), Tingke Rao(饶庭柯), Wugang Liao(廖武刚)^†, and Junjie Liu(刘俊杰)

College of Electronics and Information Engineering, Shenzhen University, Shenzhen 518060, China

Received:2022-03-26 Revised:2022-06-17 Accepted:2022-06-22 Online:2023-01-10 Published:2023-01-10
Contact: Wugang Liao E-mail:wgliao@szu.edu.cn
Supported by:
Project supported by the National Natural Science Foundation of China (Grant No. 61904110)

摘要/Abstract

摘要： A novel structure of low-voltage trigger silicon-controlled rectifiers (LVTSCRs) with low trigger voltage and high holding voltage is proposed for electrostatic discharge (ESD) protection. The proposed ESD protection device possesses an ESD implant and a floating structure. This improvement enhances the current discharge capability of the gate-grounded NMOS and weakens the current gain of the silicon-controlled rectifier current path. According to the simulation results, the proposed device retains a low trigger voltage characteristic of LVTSCRs and simultaneously increases the holding voltage to 5.53 V, providing an effective way to meet the ESD protection requirement of the 5 V CMOS process.

关键词: electrostatic discharge, floating n-well, low-voltage trigger silicon-controlled rectifier

Abstract: A novel structure of low-voltage trigger silicon-controlled rectifiers (LVTSCRs) with low trigger voltage and high holding voltage is proposed for electrostatic discharge (ESD) protection. The proposed ESD protection device possesses an ESD implant and a floating structure. This improvement enhances the current discharge capability of the gate-grounded NMOS and weakens the current gain of the silicon-controlled rectifier current path. According to the simulation results, the proposed device retains a low trigger voltage characteristic of LVTSCRs and simultaneously increases the holding voltage to 5.53 V, providing an effective way to meet the ESD protection requirement of the 5 V CMOS process.

Key words: electrostatic discharge, floating n-well, low-voltage trigger silicon-controlled rectifier

中图分类号: (Semiconductor-device characterization, design, and modeling)

85.30.De

Yuankang Chen(陈远康), Yuanliang Zhou(周远良), Jie Jiang(蒋杰), Tingke Rao(饶庭柯), Wugang Liao(廖武刚), and Junjie Liu(刘俊杰). Enhancement of holding voltage by a modified low-voltage trigger silicon-controlled rectifier structure for electrostatic discharge protection[J]. 中国物理B, 2023, 32(2): 28502-028502.

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Enhancement of holding voltage by a modified low-voltage trigger silicon-controlled rectifier structure for electrostatic discharge protection

Enhancement of holding voltage by a modified low-voltage trigger silicon-controlled rectifier structure for electrostatic discharge protection

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