中国物理B ›› 2017, Vol. 26 ›› Issue (8): 88101-088101.doi: 10.1088/1674-1056/26/8/088101

• INTERDISCIPLINARY PHYSICS AND RELATED AREAS OF SCIENCE AND TECHNOLOGY • 上一篇    下一篇

Horizontal InAs nanowire transistors grown on patterned silicon-on-insulator substrate

Wang Zhang(张望), Wei-Hua Han(韩伟华), Xiao-Song Zhao(赵晓松), Qi-Feng Lv(吕奇峰), Xiang-Hai Ji(季祥海), Tao Yang(杨涛), Fu-Hua Yang(杨富华)   

  1. 1 Engineering Research Center for Semiconductor Integrated Technology, Beijing Engineering Center of Semiconductor Micro-Nano Integrated Technology, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;
    2 School of Electronic, Electrical, and Communication Engineering, University of Chinese Academy of Sciences, Beijing 100049, China;
    3 State Key Laboratory for Superlattices and Microstructures, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;
    4 Key Laboratory of Semiconductor Materials Science, Beijing Key Laboratory of Low Dimensional Semiconductor Materials and Devices, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China
  • 收稿日期:2017-01-19 修回日期:2017-04-21 出版日期:2017-08-05 发布日期:2017-08-05
  • 通讯作者: Wei-Hua Han, Tao Yang, Fu-Hua Yang E-mail:weihua@semi.ac.cn;tyang@semi.ac.cn;fhyang@semi.ac.cn
  • 基金资助:

    Project supported by the National Key Research and Development Program of China (Grant No. 2016YFA02005003) and the National Natural Science Foundation of China (Grant Nos. 61376096 and 61327813).

Horizontal InAs nanowire transistors grown on patterned silicon-on-insulator substrate

Wang Zhang(张望)1,2, Wei-Hua Han(韩伟华)1,2, Xiao-Song Zhao(赵晓松)1,2, Qi-Feng Lv(吕奇峰)1,2, Xiang-Hai Ji(季祥海)4, Tao Yang(杨涛)4, Fu-Hua Yang(杨富华)1,2,3   

  1. 1 Engineering Research Center for Semiconductor Integrated Technology, Beijing Engineering Center of Semiconductor Micro-Nano Integrated Technology, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;
    2 School of Electronic, Electrical, and Communication Engineering, University of Chinese Academy of Sciences, Beijing 100049, China;
    3 State Key Laboratory for Superlattices and Microstructures, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;
    4 Key Laboratory of Semiconductor Materials Science, Beijing Key Laboratory of Low Dimensional Semiconductor Materials and Devices, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China
  • Received:2017-01-19 Revised:2017-04-21 Online:2017-08-05 Published:2017-08-05
  • Contact: Wei-Hua Han, Tao Yang, Fu-Hua Yang E-mail:weihua@semi.ac.cn;tyang@semi.ac.cn;fhyang@semi.ac.cn
  • About author:0.1088/1674-1056/26/8/
  • Supported by:

    Project supported by the National Key Research and Development Program of China (Grant No. 2016YFA02005003) and the National Natural Science Foundation of China (Grant Nos. 61376096 and 61327813).

摘要:

High-density horizontal InAs nanowire transistors are fabricated on the interdigital silicon-on-insulator substrate. Hexagonal InAs nanowires are uniformly grown between face-to-face (111) vertical sidewalls of neighboring Si fingers by metal-organic chemical vapor deposition. The density of InAs nanowires is high up to 32 per group of silicon fingers, namely an average of 4 nanowires per micrometer. The electrical characteristics with a higher on/off current ratio of 2×105 are obtained at room temperature. The silicon-based horizontal InAs nanowire transistors are very promising for future high-performance circuits.

关键词: InAs nanowires, Si substrate, interdigital structure, MOSFET

Abstract:

High-density horizontal InAs nanowire transistors are fabricated on the interdigital silicon-on-insulator substrate. Hexagonal InAs nanowires are uniformly grown between face-to-face (111) vertical sidewalls of neighboring Si fingers by metal-organic chemical vapor deposition. The density of InAs nanowires is high up to 32 per group of silicon fingers, namely an average of 4 nanowires per micrometer. The electrical characteristics with a higher on/off current ratio of 2×105 are obtained at room temperature. The silicon-based horizontal InAs nanowire transistors are very promising for future high-performance circuits.

Key words: InAs nanowires, Si substrate, interdigital structure, MOSFET

中图分类号:  (III-V semiconductors)

  • 81.05.Ea
81.07.Gf (Nanowires) 81.16.Dn (Self-assembly) 81.15.Gh (Chemical vapor deposition (including plasma-enhanced CVD, MOCVD, ALD, etc.))