中国物理B ›› 2022, Vol. 31 ›› Issue (1): 18505-018505.doi: 10.1088/1674-1056/ac364d

• • 上一篇    下一篇

Impact of symmetric gate-recess length on the DC and RF characteristics of InP HEMTs

Ruize Feng(封瑞泽)1,2, Bo Wang(王博)1,3, Shurui Cao(曹书睿)1,2, Tong Liu(刘桐)1, Yongbo Su(苏永波)1,2, Wuchang Ding(丁武昌)1,2, Peng Ding(丁芃)1,2,†, and Zhi Jin(金智)1,2,‡   

  1. 1 High-Frequency High-Voltage Device and Integrated Circuits Center, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China;
    2 University of Chinese Academy of Sciences, Beijing 100029, China;
    3 Guangxi Key Laboratory of Precision Navigation Technology and Application, Guilin University of Electronic Technology, Guilin 541004, China
  • 收稿日期:2021-09-07 修回日期:2021-10-28 接受日期:2021-11-04 出版日期:2021-12-03 发布日期:2021-12-30
  • 通讯作者: Peng Ding, Zhi Jin E-mail:dingpeng@ime.ac.cn;jinzhi@ime.ac.cn
  • 基金资助:
    Project supported by the National Natural Science Foundation of China (Grant No. 61434006). The authors would like to thank Yan-kui Li for his assistance during the measurements. We are also grateful to all the members of HighFrequency High-Voltage Device and Integrated Circuits Center for their valuable help during the experiment.

Impact of symmetric gate-recess length on the DC and RF characteristics of InP HEMTs

Ruize Feng(封瑞泽)1,2, Bo Wang(王博)1,3, Shurui Cao(曹书睿)1,2, Tong Liu(刘桐)1, Yongbo Su(苏永波)1,2, Wuchang Ding(丁武昌)1,2, Peng Ding(丁芃)1,2,†, and Zhi Jin(金智)1,2,‡   

  1. 1 High-Frequency High-Voltage Device and Integrated Circuits Center, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China;
    2 University of Chinese Academy of Sciences, Beijing 100029, China;
    3 Guangxi Key Laboratory of Precision Navigation Technology and Application, Guilin University of Electronic Technology, Guilin 541004, China
  • Received:2021-09-07 Revised:2021-10-28 Accepted:2021-11-04 Online:2021-12-03 Published:2021-12-30
  • Contact: Peng Ding, Zhi Jin E-mail:dingpeng@ime.ac.cn;jinzhi@ime.ac.cn
  • Supported by:
    Project supported by the National Natural Science Foundation of China (Grant No. 61434006). The authors would like to thank Yan-kui Li for his assistance during the measurements. We are also grateful to all the members of HighFrequency High-Voltage Device and Integrated Circuits Center for their valuable help during the experiment.

RichHTML

2

PDF (PC)

246

赞

摘要： We fabricated a set of symmetric gate-recess devices with gate length of 70nm. We kept the source-to-drain spacing ($L_{SD}$) unchanged, and obtained a group of devices with gate-recess length $(L_{recess})$ from 0.4$\mu$m to 0.8$\mu$m through process improvement. In order to suppress the influence of the kink effect, we have done SiN$_{X}$ passivation treatment. The maximum saturation current density ($I_{D\_max}$) and maximum transconductance ($g_{m,max}$) increase as Lrecess decreases to 0.4$\mu$m. At this time, the device shows $I_{D\_max}=749.6$mA/mm at $V_{GS}=0.2$V, $V_{DS}=1.5$V, and $g_{m\_max}=1111$mS/mm at $V_{GS}=-0.35$V, $V_{DS}=1.5$V. Meanwhile, as $L_{recess}$ increases, it causes parasitic capacitance $C_{gd}$ and $g_{d}$ to decrease, making $f_{max}$ drastically increases. When Lrecess=0.8$\mu$m, the device shows $f_{T}=188$GHz and $f_{max}=1112$GHz.

关键词: InP HEMT, InGaAs/InAlAs, current gain cut-off frequency (fT), maximum oscillation frequency (fmax), gate-recess length (Lrecess)

Abstract: We fabricated a set of symmetric gate-recess devices with gate length of 70nm. We kept the source-to-drain spacing ($L_{SD}$) unchanged, and obtained a group of devices with gate-recess length $(L_{recess})$ from 0.4$\mu$m to 0.8$\mu$m through process improvement. In order to suppress the influence of the kink effect, we have done SiN$_{X}$ passivation treatment. The maximum saturation current density ($I_{D\_max}$) and maximum transconductance ($g_{m,max}$) increase as Lrecess decreases to 0.4$\mu$m. At this time, the device shows $I_{D\_max}=749.6$mA/mm at $V_{GS}=0.2$V, $V_{DS}=1.5$V, and $g_{m\_max}=1111$mS/mm at $V_{GS}=-0.35$V, $V_{DS}=1.5$V. Meanwhile, as $L_{recess}$ increases, it causes parasitic capacitance $C_{gd}$ and $g_{d}$ to decrease, making $f_{max}$ drastically increases. When Lrecess=0.8$\mu$m, the device shows $f_{T}=188$GHz and $f_{max}=1112$GHz.

Key words: InP HEMT, InGaAs/InAlAs, current gain cut-off frequency (fT), maximum oscillation frequency (fmax), gate-recess length (Lrecess)

中图分类号:  (Field effect devices)

  • 85.30.Tv
73.40.Qv (Metal-insulator-semiconductor structures (including semiconductor-to-insulator)) 85.30.-z (Semiconductor devices)