A super-junction SOI-LDMOS with low resistance electron channel

doi:10.1088/1674-1056/abe374

中国物理B ›› 2021, Vol. 30 ›› Issue (5): 57303-057303.doi: 10.1088/1674-1056/abe374

A super-junction SOI-LDMOS with low resistance electron channel

Wei-Zhong Chen(陈伟中)^1,2, Yuan-Xi Huang(黄元熙)^1,†, Yao Huang(黄垚)¹, Yi Huang(黄义)¹, and Zheng-Sheng Han(韩郑生)^2,3

1 College of Electronics Engineering, Chongqing University of Posts and Telecommunications, Chongqing 400065, China;
2 Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China;
3 University of Chinese Academy of Sciences, Beijing 100049, China

收稿日期:2020-12-07 修回日期:2021-01-18 接受日期:2021-02-05 出版日期:2021-05-14 发布日期:2021-05-14
通讯作者: Yuan-Xi Huang E-mail:hyx115@126.com

A super-junction SOI-LDMOS with low resistance electron channel

Wei-Zhong Chen(陈伟中)^1,2, Yuan-Xi Huang(黄元熙)^1,†, Yao Huang(黄垚)¹, Yi Huang(黄义)¹, and Zheng-Sheng Han(韩郑生)^2,3

1 College of Electronics Engineering, Chongqing University of Posts and Telecommunications, Chongqing 400065, China;
2 Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China;
3 University of Chinese Academy of Sciences, Beijing 100049, China

Received:2020-12-07 Revised:2021-01-18 Accepted:2021-02-05 Online:2021-05-14 Published:2021-05-14
Contact: Yuan-Xi Huang E-mail:hyx115@126.com

摘要/Abstract

摘要： A novel super-junction LDMOS with low resistance channel (LRC), named LRC-LDMOS based on the silicon-on-insulator (SOI) technology is proposed. The LRC is highly doped on the surface of the drift region, which can significantly reduce the specific on resistance (R_on,sp) in forward conduction. The charge compensation between the LRC, N-pillar, and P-pillar of the super-junction are adjusted to satisfy the charge balance, which can completely deplete the whole drift, thus the breakdown voltage (BV) is enhanced in reverse blocking. The three-dimensional (3D) simulation results show that the BV and R_on,sp of the device can reach 253 V and 15.5 mΩ·cm², respectively, and the Baliga's figure of merit (FOM=BV²/R_on,sp) of 4.1 MW/cm² is achieved, breaking through the silicon limit.

关键词: LDMOS, breakdown voltage (BV), specific on resistance (R_on,sp), figure of merit (FOM)

Abstract: A novel super-junction LDMOS with low resistance channel (LRC), named LRC-LDMOS based on the silicon-on-insulator (SOI) technology is proposed. The LRC is highly doped on the surface of the drift region, which can significantly reduce the specific on resistance (R_on,sp) in forward conduction. The charge compensation between the LRC, N-pillar, and P-pillar of the super-junction are adjusted to satisfy the charge balance, which can completely deplete the whole drift, thus the breakdown voltage (BV) is enhanced in reverse blocking. The three-dimensional (3D) simulation results show that the BV and R_on,sp of the device can reach 253 V and 15.5 mΩ·cm², respectively, and the Baliga's figure of merit (FOM=BV²/R_on,sp) of 4.1 MW/cm² is achieved, breaking through the silicon limit.

Key words: LDMOS, breakdown voltage (BV), specific on resistance (R_on,sp), figure of merit (FOM)

中图分类号: (Semiconductor-insulator-semiconductor structures)

73.40.Ty

77.55.df (For silicon electronics) 85.30.De (Semiconductor-device characterization, design, and modeling) 51.50.+v (Electrical properties)

Wei-Zhong Chen(陈伟中), Yuan-Xi Huang(黄元熙), Yao Huang(黄垚), Yi Huang(黄义), and Zheng-Sheng Han(韩郑生). A super-junction SOI-LDMOS with low resistance electron channel[J]. 中国物理B, 2021, 30(5): 57303-057303.

Wei-Zhong Chen(陈伟中), Yuan-Xi Huang(黄元熙), Yao Huang(黄垚), Yi Huang(黄义), and Zheng-Sheng Han(韩郑生). A super-junction SOI-LDMOS with low resistance electron channel[J]. Chin. Phys. B, 2021, 30(5): 57303-057303.

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A super-junction SOI-LDMOS with low resistance electron channel

A super-junction SOI-LDMOS with low resistance electron channel

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