中国物理B ›› 2021, Vol. 30 ›› Issue (7): 77303-077303.doi: 10.1088/1674-1056/abf644

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Impact of O2 post oxidation annealing on the reliability of SiC/SiO2 MOS capacitors

Peng Liu(刘鹏)1,2,3, Ji-Long Hao(郝继龙)1,2,3, Sheng-Kai Wang(王盛凯)1,2,3,†, Nan-Nan You(尤楠楠)1,2,3, Qin-Yu Hu(胡钦宇)1,2,3, Qian Zhang(张倩)1,2,3, Yun Bai(白云)1,2,3,‡, and Xin-Yu Liu(刘新宇)1,2,3   

  1. 1 Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China;
    2 University of Chinese Academy of Sciences, Beijing 100049, China;
    3 High-Frequency High-Voltage Device and Integrated Circuits R&D Center, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China
  • 收稿日期:2021-02-19 修回日期:2021-04-01 接受日期:2021-04-09 出版日期:2021-06-22 发布日期:2021-06-26
  • 通讯作者: Sheng-Kai Wang, Yun Bai E-mail:wangshengkai@ime.ac.cn;baiyun@ime.ac.cn
  • 基金资助:
    Project supported by the General Program of the National Natural Science Foundation of China (Grant No. 61974159) and the Youth Innovation Promotion Association of the Chinese Academy of Sciences and Scientific Instrument Developing Project of the Chinese Academy of Sciences (Grant No. YJKYYQ20200039).

Impact of O2 post oxidation annealing on the reliability of SiC/SiO2 MOS capacitors

Peng Liu(刘鹏)1,2,3, Ji-Long Hao(郝继龙)1,2,3, Sheng-Kai Wang(王盛凯)1,2,3,†, Nan-Nan You(尤楠楠)1,2,3, Qin-Yu Hu(胡钦宇)1,2,3, Qian Zhang(张倩)1,2,3, Yun Bai(白云)1,2,3,‡, and Xin-Yu Liu(刘新宇)1,2,3   

  1. 1 Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China;
    2 University of Chinese Academy of Sciences, Beijing 100049, China;
    3 High-Frequency High-Voltage Device and Integrated Circuits R&D Center, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China
  • Received:2021-02-19 Revised:2021-04-01 Accepted:2021-04-09 Online:2021-06-22 Published:2021-06-26
  • Contact: Sheng-Kai Wang, Yun Bai E-mail:wangshengkai@ime.ac.cn;baiyun@ime.ac.cn
  • Supported by:
    Project supported by the General Program of the National Natural Science Foundation of China (Grant No. 61974159) and the Youth Innovation Promotion Association of the Chinese Academy of Sciences and Scientific Instrument Developing Project of the Chinese Academy of Sciences (Grant No. YJKYYQ20200039).

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摘要： The effects of dry O2 post oxidation annealing (POA) at different temperatures on SiC/SiO2 stacks are comparatively studied in this paper. The results show interface trap density (Dit) of SiC/SiO2 stacks, leakage current density (Jg), and time-dependent dielectric breakdown (TDDB) characteristics of the oxide, are affected by POA temperature and are closely correlated. Specifically, Dit, Jg, and inverse median lifetime of TDDB have the same trend against POA temperature, which is instructive for SiC/SiO2 interface quality improvement. Moreover, area dependence of TDDB characteristics for gate oxide on SiC shows different electrode areas lead to same slope of TDDB Weibull curves.

关键词: SiC, O2 post oxidation annealing, interface traps, MOS

Abstract: The effects of dry O2 post oxidation annealing (POA) at different temperatures on SiC/SiO2 stacks are comparatively studied in this paper. The results show interface trap density (Dit) of SiC/SiO2 stacks, leakage current density (Jg), and time-dependent dielectric breakdown (TDDB) characteristics of the oxide, are affected by POA temperature and are closely correlated. Specifically, Dit, Jg, and inverse median lifetime of TDDB have the same trend against POA temperature, which is instructive for SiC/SiO2 interface quality improvement. Moreover, area dependence of TDDB characteristics for gate oxide on SiC shows different electrode areas lead to same slope of TDDB Weibull curves.

Key words: SiC, O2 post oxidation annealing, interface traps, MOS

中图分类号:  (Electron states at surfaces and interfaces)

  • 73.20.-r
73.40.Qv (Metal-insulator-semiconductor structures (including semiconductor-to-insulator))