中国物理B ›› 2017, Vol. 26 ›› Issue (12): 127701-127701.doi: 10.1088/1674-1056/26/12/127701

• CONDENSED MATTER: ELECTRONIC STRUCTURE, ELECTRICAL, MAGNETIC, AND OPTICAL PROPERTIES • 上一篇    下一篇

Near-interface oxide traps in 4H-SiC MOS structures fabricated with and without annealing in NO

Qiu-Jie Sun(孙秋杰), Yu-Ming Zhang(张玉明), Qing-Wen Song(宋庆文), Xiao-Yan Tang(汤晓燕), Yi-Meng Zhang(张艺蒙), Cheng-Zhan Li(李诚瞻), Yan-Li Zhao(赵艳黎), Yi-Men Zhang(张义门)   

  1. 1. Key Laboratory of Wide Band Gap Semiconductor Materials and Devices, School of Microelectronics, Xidian University, Xi'an 710071, China;
    2. Zhuzhou CRRC Times Electric Company Limited, Zhuzhou 412001, China
  • 收稿日期:2017-06-14 修回日期:2017-08-22 出版日期:2017-12-05 发布日期:2017-12-05
  • 通讯作者: Qing-Wen Song, Qing-Wen Song E-mail:qwsong@xidian.edu.cn;xytang@mail.xidian.edu.cn
  • 基金资助:
    Project supported by the National Key Basic Research Program of China (Grant No. 2015CB759600), the Natural Science Basic Research Plan in Shaanxi Province, China (Grant No. 2017JM6003), and the National Natural Science Foundation of China (Grant Nos. 61774117 61404098 and 61274079).

Near-interface oxide traps in 4H-SiC MOS structures fabricated with and without annealing in NO

Qiu-Jie Sun(孙秋杰)1, Yu-Ming Zhang(张玉明)1, Qing-Wen Song(宋庆文)1, Xiao-Yan Tang(汤晓燕)1, Yi-Meng Zhang(张艺蒙)1, Cheng-Zhan Li(李诚瞻)2, Yan-Li Zhao(赵艳黎)2, Yi-Men Zhang(张义门)1   

  1. 1. Key Laboratory of Wide Band Gap Semiconductor Materials and Devices, School of Microelectronics, Xidian University, Xi'an 710071, China;
    2. Zhuzhou CRRC Times Electric Company Limited, Zhuzhou 412001, China
  • Received:2017-06-14 Revised:2017-08-22 Online:2017-12-05 Published:2017-12-05
  • Contact: Qing-Wen Song, Qing-Wen Song E-mail:qwsong@xidian.edu.cn;xytang@mail.xidian.edu.cn
  • Supported by:
    Project supported by the National Key Basic Research Program of China (Grant No. 2015CB759600), the Natural Science Basic Research Plan in Shaanxi Province, China (Grant No. 2017JM6003), and the National Natural Science Foundation of China (Grant Nos. 61774117 61404098 and 61274079).

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摘要： Near-interface oxide traps (NIOTs) in 4H-SiC metal-oxide-semiconductor (MOS) structures fabricated with and without annealing in NO are systematically investigated in this paper. The properties of NIOTs in SiC MOS structures prepared with and without annealing in NO are studied and compared in detail. Two main categories of the NIOTs, the “slow” and “fast” NIOTs, are revealed and extracted. The densities of the “fast” NIOTs are determined to be 0.76×1011 cm-2 and 0.47×1011 cm-2 for the N2 post oxidation annealing (POA) sample and NO POA sample, respectively. The densities of “slow” NIOTs are 0.79×1011 cm-2 and 9.44×1011 cm-2 for the NO POA sample and N2 POA sample, respectively. It is found that the NO POA process only can significantly reduce “slow” NIOTs. However, it has a little effect on “fast” NIOTs. The negative and positive constant voltage stresses (CVS) reveal that electrons captured by those “slow” NIOTs and bulk oxide traps (BOTs) are hardly emitted by the constant voltage stress.

关键词: 4H-SiC, MOS, Near-Interface, Oxide, traps

Abstract: Near-interface oxide traps (NIOTs) in 4H-SiC metal-oxide-semiconductor (MOS) structures fabricated with and without annealing in NO are systematically investigated in this paper. The properties of NIOTs in SiC MOS structures prepared with and without annealing in NO are studied and compared in detail. Two main categories of the NIOTs, the “slow” and “fast” NIOTs, are revealed and extracted. The densities of the “fast” NIOTs are determined to be 0.76×1011 cm-2 and 0.47×1011 cm-2 for the N2 post oxidation annealing (POA) sample and NO POA sample, respectively. The densities of “slow” NIOTs are 0.79×1011 cm-2 and 9.44×1011 cm-2 for the NO POA sample and N2 POA sample, respectively. It is found that the NO POA process only can significantly reduce “slow” NIOTs. However, it has a little effect on “fast” NIOTs. The negative and positive constant voltage stresses (CVS) reveal that electrons captured by those “slow” NIOTs and bulk oxide traps (BOTs) are hardly emitted by the constant voltage stress.

Key words: 4H-SiC, MOS, Near-Interface, Oxide, traps

中图分类号:  (Dielectric breakdown and space-charge effects)

  • 77.22.Jp
73.20.-r (Electron states at surfaces and interfaces) 77.84.Lf (Composite materials)