Cite this Article
Yao Jia-Fei, Guo Yu-Feng, Zhang Zhen-Yu, Yang Ke-Meng, Zhang Mao-Lin, Xia Tian. Numerical and analytical investigations for the SOI LDMOS with alternated high-k dielectric and step doped silicon pillars. Chinese Physics B, 2020, 29(3): 038503  
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Numerical and analytical investigations for the SOI LDMOS with alternated high-k dielectric and step doped silicon pillars
Yao Jia-Fei1, 2, Guo Yu-Feng1, 2, †, Zhang Zhen-Yu1, 2, Yang Ke-Meng1, 2, Zhang Mao-Lin1, 2, Xia Tian3
College of Electronic and Optical Engineering & College of Microelectronics, Nanjing University of Posts and Telecommunications, Nanjing 210023, China
National and Local Joint Engineering Laboratory of RF Integration and Micro-Assembly Technology, Nanjing 210023, China
School of Electrical Engineering, University of Vermont, Burlington, VT 05405, USA

 

† Corresponding author. E-mail: yfguo@njupt.edu.cn

Abstract
Abstract

This paper presents a new silicon-on-insulator (SOI) lateral-double-diffused metal-oxide-semiconductor transistor (LDMOST) device with alternated high-k dielectric and step doped silicon pillars (HKSD device). Due to the modulation of step doping technology and high-k dielectric on the electric field and doped profile of each zone, the HKSD device shows a greater performance. The analytical models of the potential, electric field, optimal breakdown voltage, and optimal doped profile are derived. The analytical results and the simulated results are basically consistent, which confirms the proposed model suitable for the HKSD device. The potential and electric field modulation mechanism are investigated based on the simulation and analytical models. Furthermore, the influence of the parameters on the breakdown voltage (BV) and specific on-resistance (Ron, sp) are obtained. The results indicate that the HKSD device has a higher BV and lower Ron, sp compared to the SD device and HK device.

PACS: ;85.30.De;;85.30.Tv;;73.40.Qv;
Keyword:;high-k dielectric;;step doped silicon pillar;;model;;breakdown voltage;
1. Introduction

Silicon-on-insulator (SOI) lateral double-diffused metal oxide semiconductor (LDMOS) devices are applicable to high-voltage power integrated circuits for industrial and automotive applications, due to their properties of ideal isolation, high breakdown voltage, low leakage current, and good compatibility.[1–3] One of the most important issues in the design of SOI LDMOS devices is to relieve the contradiction between the breakdown voltage (BV) and specific on-resistance Ron, sp. To overcome such a contradiction, designs of drift doping profiles have been explored to modulate the electric field of SOI LDMOS devices.[4–6] The step doped (SD) profile is one of the most popular technologies, which has been applied to many structures of lateral power devices.[6–10] The SD technology leads to a higher BV than the uniformly doped profile while providing a simplification in the design and processing when compared to the linearly graded profile.[6] The analytical model and experimental results indicate that the step doping technology has a merit of the trade-off between the performance and fabrication cost.[9, 10]

In this paper, a new SOI LDMOS device with alternated high-k dielectric and step doped silicon pillars (HKSD) is proposed. The electric field could be improved and the doping profile could be modulated due to the assistant depletion of the high-k dielectric pillars, which results in an improvement of the BV and reduction of the Ron, sp.[11–14] With the employed side high-k dielectric into the SD device, the electric field is further modulated and a higher BV and higher doping concentration can be obtained compared to the SD device without side high-k dielectric.

This paper also presents the analytical model for the HKSD device to reveal the modulation effect of step doped technology and the high-k dielectric pillars on the characteristics of this new device. The dependence of the electric field, the optimal breakdown voltage and the optimal doping profile on the device parameters are compared and discussed. This physical model matches the simulation results very well and provides a useful guide on the design of the HKSD device.

2. Device structure and analytical model
2.1. Device structure

The three-dimensional structure of the HKSD device is shown in Fig. 1(a). The drift region of the proposed HKSD device contains the alternated high-k pillars and silicon pillars. Each silicon pillar is divided into n uniformly doped zones, N i is defined as the doping concentration for the i-th zone of the silicon pillar. The doping concentration is increased with steps of the doping increment . The schematic of the doping concentration in the silicon pillar is shown Fig. 1(a), N i should satisfy according to the proposed model. By doping a suitable dose in each zone and employing a suitable high-k dielectric, the applied voltage is sustained by each zone averagely, resulting in a higher breakdown voltage.

Fig. 1. (a) Three-dimensional structure of the HKSD device and the schematic of doping concentration in silicon pillar. (b) The x--z cross-section of one basic unit of the HKSD device. (c) The Gaussian box of the i-th zone.

The x–z cross-section of one basic unit of the HKSD device is shown in Fig. 1(b). and are the widths of the high-k dielectric pillar and silicon pillar, respectively. The relative permittivity of the high-k dielectric, silicon, and oxide are , and , respectively. and are the total length of the drift region and the width of the basic unit. The basic parameters and their values used in this paper are presented in table 1.

Table 1.

Device parameters and symbols.

.

The main feature of the proposed HKSD device is the alternated high-k dielectric pillars and step doped silicon pillars in the drift region. The technique to realize the high-k dielectric pillars in the drift region has been discussed in [12, 14]. After etching the trenches, the high-k dielectric is deposited into the trenches by pulsed-laser deposition. Then, the chemical mechanical polishing is used to polish the surface. The alternated high-k dielectric pillars and silicon pillars are formed. The next step is to realize the step doped silicon pillars, ions implanting with the specific dose are implemented, then the step doped silicon pillars are obtained after the drive-in anneal.[15, 16] After the step doped silicon pillars are formed, the p-well, the gate oxide and polysilicon, the p+ region, the n+ source/drain regions, and the metal electrodes are formed by the standard deposition, patterning and metallization techniques in the CMOS process.

2.2. Potential and electric field model

For exploring the physical insight of the drift region with alternated high-k dielectric and step doped silicon pillars, the Gaussian box of the i-th zone is considered and illustrated in Fig. 1(c). The coordinate axis is established as shown in this figure. In the following discussion, the length of each zone is defined as a fixed value of L, which is equal to . Typically, the potential functions and in the high-k region and silicon region of this Gaussian box satisfy the three-dimensional Poisson equation, expressed as

The boundary conditions for the solutions are as follows:

(1) and . The V i and are defined as the potential at the edge of the i-th zone.

(2) since the vertical electric field at the surface (y = 0) may be minimized.[11]

(3) and due to the continuity of electric flux density at the silicon and oxide interface ().[11]

(4) and since and are symmetrical lines.[13]

(5) , and according to the continuances of the potential, electric field, and doping at the interface of the high-k and silicon region.[13]

Solving the 3D Poisson equation for the Gaussian box under the boundary conditions,[14] the potential expression and electric field expression at the x-direction along the line is derived as

with

The V i in equations (3) and (4) can be obtained by solving the together with the condition of , expressed as

with

equals the external voltage applied on the drain, therefore V i can be obtained by the boundary conditions . Actually, the voltage can be sustained by each zone averagely when considering the optimization of the HKSD device, then Vi will be expressed as .

3. Simulation and analytical results

To investigate the mechanism of the proposed HKSD device, the comparison between the HKSD devices with different n (n = 1, 2, 3, and 4) are conducted. The equipotential contours for the HKSD devices at their respective optimal BV are shown in Fig. 2 In Fig. 2(a), the device with n = 1 represents the HK device which has no step doped zones in the silicon pillar. For this device, the potential lines in the middle of the drift region are still sparsely distributed although the high-k dielectric can modulate the distribution of the potential lines.[11] Therefore, the SD technology is introduced to improve the breakdown voltage by the further modulation of SD technology on the equipotential contours. As depicted in Fig. 2(b), the potential lines are concentrated in the middle of the drift region, where is the interface of the different doped zones. Obviously, there are also concentrate effect of the potential lines in figures 2(c) and 2(d). Therefore, the applied voltage can be sustained by each zone regularly and the electric field has been modified, leading to the improvement of breakdown voltage. Fig. 3 illustrates the simulated and analytical results of the potential distributions along the A– line for the HKSD devices at their respective optimal BV. The results of the SD devices with the same n are also given to make a comparison. The solid lines represent the analytical results of equation (4), and the dots are the simulated results extracted from the TCAD simulator. The analytical model and simulation results are matched perfectly. As shown in Fig. 3, the potential drops always locate at the interfaces of different zones or the junctions, which produces the electric field peaks. The potential drops could be reduced by increasing n, then the electric field peaks reduce accordingly. Compared to the SD device with the same n, it is obvious that the HKSD device has a better potential distribution due to the modulation of the high-k dielectric pillar.

Fig. 2. The equipotential contours for the HKSD devices (\varepsilon_{{\rm D}} =100, L_{\rm d}=60~\upmum) with different n,(a) n=1, (b) n=2, (c) n=3, (d) n=4.
Fig. 3. The potential distributions for the HKSD devices (ɛD=100, Ld=60μm) and SD devices (Ld=60μm) with different n: (a) n=1, (b) n=2, (c) n=3, (d) n=4.

Fig. 4 illustrates the simulated and analytical results of the electric field distribution along the A– line for the HKSD devices at their respective optimal BV. The analytical results and the simulated results are basically consistent. As seen from Fig. 4(a), the device with n = 1 has a low electric field in the middle of the drift region, which results in a low BV. With introducing the SD technology, new electric field peaks are formed at the interface of the different doped zones. Therefore, the HKSD device has a higher BV compared to the device without step doped zones. With the increasing n, it achieves a more uniform electric field and a higher breakdown voltage. On the other hand, Fig. 4 also indicates that the electric field valley of each zone in the HKSD device is higher than that of the SD device, while the electric field peak of the HKSD device is lower than that of the SD device, this is because the high-k dielectric enhances the RESURF effect. Therefore, the HKSD device has a higher BV compared to the SD device. Note that the BV of the HKSD device with n = 3 is higher than the HKSD device with n = 4, this is because of the more step doped zones will reduce the electric field peaks, which may cause the decreasing BV. Therefore, the reasonable design of the step doped zones in HKSD devices is necessary for obtaining the highest BV.

Fig. 4. The electric field distributions for the HKSD devices (ɛD =100, Ld=60μm) and SD devices (Ld=60μm) with different n: (a) n=1, (b) n=2, (c) n=3, (d) n=4.
4. Optimizations and discussion

For the HKSD device, the step doped profile brings electric field peaks at the interfaces of the adjacent zones, which comes from the mechanism same as the SD device. To optimize the breakdown voltage, the peck values are equal and they should be equal to the critical value of . Substituting equation (4) into , the optimal breakdown voltage () is satisfied:

and the doping concentration Ni is satisfied:

where N1 is the doping concentration of the first zone, expresses as

Then, the doping increment equals 2N1. For the conventional SD device, T equals , then equation (6) can be expressed as and equation (8) can be expressed as , which are corresponding to [7].

Fig. 5 gives the dependence of on n for the HKSD device and the SD device. The analytical results are in agreement well with the simulation results for both the devices. As shown in Fig. 5, the BV of the HKSD device is much larger than that of the SD device with the same n because of the employed high-k dielectric. For the SD device, the BV increases regularly with the increase of n. While for the HKSD device with n = 2, 3 or 4, their BVs are at the same level. The HK device (n=1) has a low BV because its middle drift region does not sustain the appropriate voltage as shown in Fig. 2. When n is large enough, the approximates to , then equaiton (6) can be written as . This means that the breakdown voltage is irrelevant to structure parameters except for the . Therefore, the BVs with or without the side high-k dielectric will be the same.

Fig. 5. Dependence of BV on n for the HKSD device (ɛD =100) and the SD device.

Fig. 6 gives the dependence of N1 on n for the HKSD device and the SD device, the doping concentration of the i-th zone satisfies equation (7). The analytical results and simulation results are well matched. The results indicate that the N1 reduces with the increasing n, which can be explained by equation (8). As shown in the figure, N1 decreases smoothly with the increase of n for the SD device, while N1 decreases rapidly with the increase of n for the HKSD device. The doping concentration of the HKSD device is much higher than that of the SD device, which is due to the assistant depletion of the high-k dielectric. When nT is larger enough, N1 of the HKSD device is times of N1 of the SD device, which only depends on the width of the high-k dielectric pillar but not on the permittivity of the high-k dielectric.

Fig. 6. Dependences of Nd on n for the HKSD device (ɛD =100) and the SD device.

Fig. 7 shows the on-state characteristic of the SD device, the HK device, and the HKSD (n = 2) device. According to the subgraph, the threshold voltage of all the three devices is 1.2 V, because they have the same parameters of the channel and gate oxide layer. The I–V curves show that the HK and HKSD devices have higher compared to the SD device at the same . The slopes of the linear region in the I–V curves of the HK and HKSD devices are much higher than that of the SD device, which means that the HKSD device has lower specific on-resistance.

Fig. 7. Transfer and I--V characteristics of the HKSD and SD devices.

The specific on-resistance plays a relevant role in the lateral device. For the step doped region, the drift region resistance is obtained by connecting the resistor of each zone in series, expressed as:

Therefore, the specific on-resistance of the HKSD device can be expressed as:

where S is the area of the device containing the dielectric pillar and silicon pillar, Rx is defined as the additional resistances such as the channel resistance, contact resistance, source resistance, and drain resistance.

Fig. 8 shows the dependence of on n for the HKSD and SD devices. We calculate the drift region resistance and add a fixed value of Rx when analyze the total device on-resistance. The calculated specific on-resistance fits the simulated results well with the given parameters. As shown in this figure, the resistance of the HKSD device is lower than that of the SD device with the same step number n due to the assistant depletion of high-k dielectric on the doping profile of the silicon pillar. The specific on-resistance of the HKSD device with n = 2 is smallest. When n increases, the reduced N1 results in a higher resistance of the first zone, the total resistance of the drift region serially connected by the resistance of each zone will be increased accordingly. Contrasting the four subgraphs of Fig. 8, the device with longer drift region has a large specific on-resistance because the large device area.

Fig. 8. Dependence of Ron,sp on n for the HKSD device (ɛD =100) and the SD device.

Since the strongly depends on the ratio , Fig. 9 illustrates the influence of on the doping concentration and under a given . means the SD device without high-k dielectric. It is obvious that the is reduced by employing the high-k dielectric because of the modulation of the high-k dielectric on the doping concentration. As shown in the figure, the doping concentration increasing regularly with the increasing . However, the higher means a larger surface area, which results in the increasing . In consideration of the process tolerance, is suitable for design of the HKSD device.

Fig. 9. Dependences of N1 and Ron,sp on WD/WS for the HKSD devices with different Ld.

According to the above discussions, the high-k materials can improve the breakdown voltage by modulating the electric field and reduce the by increasing the doping concentration of silicon pillars. Therefore, Fig. 10 gives the simulation results of dependence of BV and on the permittivity . The permittivity values of 25, 50, 80, and 100 are corresponding to the high-k materials of HfO2,[17] ZrTiO4,[18] TiO2,[19] SrTiO3.[20] As shown in this figure, the HKSD device with the higher has a higher BV. It is obvious that the HKSD device with n = 2 is more easily affected by , but with a high , the BV approaches equality. The HKSD device with n = 3 demonstrates the highest BV among all the devices when is large enough. Fig. 10 also indicates that the has great influence on the of the HK device with n = 2, while has small influence when n = 3 and n = 4. When is large enough, the is almost the same.

Fig. 10. Dependences of BV and Ron,sp on ɛD for the HKSD devices with different Ld.

The relationship between the and BV of the HKSD device in this work together with some experimental data[4, 7, 10] and simulated data[5, 9, 12] reported previously are given in Fig. 11. The results of this work are related to the HKSD devices with μm, and the specific structure parameters given in table 1. Baliga’s ideal silicon limit curve[21] is also used to make the comparison. We can see that the results of the HKSD devices with n = 2, n = 3 and n = 4 almost approach to the silicon limit rather than the HKSD devices with n = 1 and some other devices. Thus, the HKSD device exhibits a super performance on the trade-off between the and BV.

Fig. 11. Ron,sp versus BV for different LDMOS devices.
5. Conclusions

A novel HKSD SOI LDMOS device and its analytical model are presented in this paper. The main feature of this new device is the alternated high-k dielectric and step doped silicon pillars of the drift region. First, the potential and electric field are obtained to investigate the mechanism of the HKSD device, then the optimal breakdown voltage and the optimal doping profile of each zone are calculated to guide the design of HKSD devices. The analytical results fit the simulation results well, which provides the validity of the proposed model. The on-state characteristic is also given to show the advance of the HKSD device. The results have demonstrated that the HKSD device has a higher breakdown voltage and lower specific on-resistance compared to the SD and HK devices.

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