Numerical and analytical investigations for the SOI LDMOS with alternated high-k dielectric and step doped silicon pillars
Yao Jia-Fei1, 2, Guo Yu-Feng1, 2, †, Zhang Zhen-Yu1, 2, Yang Ke-Meng1, 2, Zhang Mao-Lin1, 2, Xia Tian3
       

(a) Three-dimensional structure of the HKSD device and the schematic of doping concentration in silicon pillar. (b) The x--z cross-section of one basic unit of the HKSD device. (c) The Gaussian box of the i-th zone.