Numerical and analytical investigations for the SOI LDMOS with alternated high-k dielectric and step doped silicon pillars
Yao Jia-Fei1, 2, Guo Yu-Feng1, 2, †, Zhang Zhen-Yu1, 2, Yang Ke-Meng1, 2, Zhang Mao-Lin1, 2, Xia Tian3
       

Dependences of N1 and Ron,sp on WD/WS for the HKSD devices with different Ld.