中国物理B ›› 2022, Vol. 31 ›› Issue (1): 16801-016801.doi: 10.1088/1674-1056/ac34fe
Chi Sun(孙驰)1,2, Linyuan Zhao(赵林媛)4, Tingting Hao(郝婷婷)1,2, Renrong Liang(梁仁荣)4,5, Haitao Ye(叶海涛)6, Junjie Li(李俊杰)1,2,3, and Changzhi Gu(顾长志)1,2,†
Chi Sun(孙驰)1,2, Linyuan Zhao(赵林媛)4, Tingting Hao(郝婷婷)1,2, Renrong Liang(梁仁荣)4,5, Haitao Ye(叶海涛)6, Junjie Li(李俊杰)1,2,3, and Changzhi Gu(顾长志)1,2,†
摘要: Three-dimensional (3D) vertical architecture transistors represent an important technological pursuit, which have distinct advantages in device integration density, operation speed, and power consumption. However, the fabrication processes of such 3D devices are complex, especially in the interconnection of electrodes. In this paper, we present a novel method which combines suspended electrodes and focused ion beam (FIB) technology to greatly simplify the electrodes interconnection in 3D devices. Based on this method, we fabricate 3D vertical core-double shell structure transistors with ZnO channel and Al2O3 gate-oxide both grown by atomic layer deposition. Suspended top electrodes of vertical architecture could be directly connected to planar electrodes by FIB deposited Pt nanowires, which avoid cumbersome steps in the traditional 3D structure fabrication technology. Both single pillar and arrays devices show well behaved transfer characteristics with an Ion/Ioff current ratio greater than 106 and a low threshold voltage around 0 V. The ON-current of the 2×2 pillars vertical channel transistor was 1.2 μA at the gate voltage of 3 V and drain voltage of 2 V, which can be also improved by increasing the number of pillars. Our method for fabricating vertical architecture transistors can be promising for device applications with high integration density and low power consumption.
中图分类号: (Semiconductors)