The metal–oxide–semiconductor field-effect transistor (MOSFET) has kept pace with Moore’s law by improving the “performance/power” ratio since 2000. New materials, such as strained silicon,^[1] high-k dielectric and metal gate electrodes,^[2] are introduced in the complementary metal–oxide–semiconductor (CMOS) process to increase the carrier mobility. However, as the space of pn junctions in source and drain drops to less than 10 nm, there is a great challenge in the fabrication of pn junctions with heavily doping concentration gradients. In recent years, the silicon junctionless nanowire transistor (JNT) with uniform doping in source, drain, and channel has attracted much attention due to the simple fabrication and unique properties, in which the narrow conduction channel emerges in the axis of the silicon nanowire. Compared with the inversion-mode transistors, JNTs have less degradation of mobility and more apparent quantum-confinement effects on carrier transport.^[3,4] Therefore, it is necessary to understand the strong oscillatory behaviors of carrier effective mobility in the quantized subband structure. Yamada et al. estimated the subband mobility of quasi-two-dimensional electrons in Si atomic layer doped GaAs for the first time, in which the subband mobility difference was up to 20:1.^[5] Each new subband filling results in an increased intersubband Coulomb scattering, thus a reduced mobility. Colinge et al. measured the subband mobility of trigate silicon-on-insulator (SOI) MOSFETs to reach about 1200 cm²/(V s) due to screening of impurity scattering at the temperature of 4.4 K, which decreases as temperature increases.^[6] The Coulomb scattering is temperature-dependent for thermally activated carriers between impurity band and conductive subbands. Yi et al. observed quantum confinement effects of sub-5-nm thick p-Si junctionless nanowire (NW) field-effect transistors (FETs) at room temperature.^[4] The hole mobility is increased in p-SiNW FETs, which is caused by minimal acoustic phonon assisted intersubband scattering. In this paper, we investigate temperature-dependent effective mobility characteristics in impurity band and conduction subbands of n-doped silicon JNT. Interestingly, the electron effective mobility of conduction subbands has a maximum value at low temperatures, which relates to the minimum electron effective mobility of the impurity band. The effective subband mobility is temperature-dependent on the electron interactions by thermal activation, impurity scattering, and intersubband scattering.

The device in Fig. 1(a) was fabricated on the (100)-orientated SOI wafer, with the top silicon thickness of 55 nm and buried oxide layer of 145 nm. First, the top silicon layer was implanted under SiO₂ buffer layer with 33-keV arsenic ions at a dose of 2×10¹² cm⁻². Following the implantations, the silicon nanowire along the direction was defined by electron beam lithography (EBL) and reactive ion etching (RIE). The width of the nanowire was about 60 nm, which was measured by scanning electron microscope (SEM). Then the silicon nanowire was oxidized at 900 °C for 10 min in dry oxygen ambience to form an SiO₂ layer. Next, SiO₂ layer was removed by buffered oxide etcher (BOE) for 40 s to reduce the size of silicon nanowire and remove the etching damage. Subsequently, the 22-nm-thick gate dielectric layer was generated on the surface of silicon nanowires by thermal oxidation. The 200-nm-thick undoped polysilicon layer was then deposited by low-pressure chemical vapor deposition (LPCVD). The polysilicon layer was oxidized at 900 °C for 30 min in oxygen ambience to form a 15 nm-thick SiO₂ layer. The poly-Si layer was implanted with 33-keV boron ions at the dose of 2×10¹² cm⁻², followed by furnace annealing at 1000 °C for 15 s. Following the implantations, the polycrystalline gate pattern was defined by EBL and inductively couple plasma (ICP) etching. Then, a 200 nm-thick SiO₂ passivation layer was deposited by LPCVD. Finally, the source, drain, and gate electrodes were fabricated. Figure 1(b) shows the top view SEM image of the device. We measured the JNT electrical characterization with an Agilent B1500 A semiconductor parameter analyzer within the temperature range from 6 K to 250 K.

Fig. 1.

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	Fig. 1. (a) The schematic structure and (b) top-view SEM image of the silicon junctionless nanowire transistor.

Figure 2 shows the measured drain current I_ds in the JNT device as a function of gate voltage V_g and temperatures at the bias V_ds= 10 mV in both linear and log scales. Clear oscillatory peaks and several step-like drain current features are observed at the initial stage of the I_ds–V_g transfer characteristics, implying the evolution of electron transport behaviors from quantum dots to quantum wire. The initial drain current below the gate voltage of about 2.3 V flows through an ultra-narrow channel in the center axis of silicon nanowire, in which several ionized dopant atoms work as quantum dots in an array. With the gate voltage increasing, the dopant barrier potentials are reduced in the wider channel, thereby enhancing the coupling of dopant-induced quantum dots. The Fermi energy level is allowed to enter the conduction subbands in the quantum confined one-dimensional channel. The step-like current features at the gate voltages of around 2.5 V and 2.8 V result from the successive filling of individual subband. Each current step corresponds to the filling of a new subband. However, as the temperature increases up to 100 K, the current oscillation features gradually decrease and disappear due to the weak potential confinement in conduction channel.

Fig. 2.

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	Fig. 2. Drain current Idsversus gate voltage Vg with bias Vds=10 mV at different temperatures.

Figure 3(a) shows that several remarkable oscillation peaks at initial conductance varies with the gate voltage within the temperature range from 6 K to 50 K, which are successively shifted in the conductance for clarity. Only one oscillation peak is observed at the temperature of 6 K, which results from electron tunneling through the level in only one donor-induced quantum dot. Under the gate electric field, the electrons self-consistently fill in the D⁻ level state of the neutral donor atom, which is much closer to the top of the barrier along the transport direction due to screened donor potential.^[7] As the temperature rises, thermally activated electrons are able to hop through the optimal neighbor dopant atoms. Several split peaks are observed in the temperature range from 10 K to 50 K in Fig. 3(a), resulting from the coupling effect in the dopant-induced quantum dot array. To show this more clearly, the drain current I_ds and transconductance g_m curves are presented in Fig. 3(b) as a function of gate voltage V_g in different bias V_ds from 3 mV to 10 mV at the temperature of 30 K. Two groups of double oscillation current peaks can be observed at the gate voltage of 1.95 V and 2.13 V, resulting from the electrons tunneling through the D⁰ and D⁻ states of the two ionized donors. As a result, according to the spacing of the gate voltage between the D⁰ and D⁻ states of current peaks, we estimate the gate capacitance aF for single dopant-induced quantum dot with the potential radius of 1.54 nm.

Fig. 3.

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	Fig. 3. (a) The conductance G varies with the gate voltage Vg in Vds=10 mV at different temperatures. The curves are successively shifted in the conductance for clarity. (b) The transconductance gm versus the gate voltage Vg and the transfer characteristic curve Ids–Vg in Vds=3 mV–10 mV at the temperature of 30 K.

Figure 4 provides three remarkable temperature-dependent peaks of the transconductance g_m ( , which are extracted from the temperature-dependent transfer characteristic curves in Fig. 2. It can be observed that the g_m-peak positions in the gate voltage V_g are basically stable with the temperature increasing, corresponding to the step positions of the drain-current I_ds. At the temperature of 6 K, the first transconductance peak at the gate voltage of about 2.13 V originates from the electron tunneling through the D⁻ level of dopant-induced quantum dots. The second and third transconductance peaks at the gate voltages of about 2.44 V and 2.86 V correspond to the electron one-dimensional transport in the first and second conduction subbands, which are the lowest subbands respectively in the 2-fold perpendicular valleys and the 4-fold in-plane valleys of the strain silicon nanowire.^[8]

Fig. 4.

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	Fig. 4. Temperature-dependent transconductance gm–Vg curves, which are successively shifted for clarity.

In order to understand the interaction mechanism between the impurity band and the conduction subbands, we further investigate the dependence of effective electron mobility on the temperatures. Similar to the definition of the effective electron mobility in inversion-mode MOSFETs in the triode operation regime, the effective mobility in linear accumulation regime of the silicon JNT can be estimated by^[4,9–11]

Fig. 5.

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	Fig. 5. The temperature-dependent effective mobilities of the impurity band and the conduction subbands. The inset is the diagram of the energy band.

The effective subband mobilities and have the largest value at the temperature of 30 K and 15 K, respectively, due to the increased electron concentration and intersubband Coulomb scattering. The effective subband mobility enhancement is attributed to the increase of activated electrons in the occupancy of conduction subbands.^[12] The effective mobility in the first subband is higher than the in the second subband, because the effective electron mass in 2-fold valleys is lower than that in 4-fold valleys. The successive filling of individual subband strengthens the intersubband scattering with Fermi energy moving up, further reducing the effective subband mobilities. It is also interesting that the effective mobility of impurity band is higher than that of subbands as the temperature is higher than 100 K, which is attributed to the phonon scattering. This means that the intersubband Coulomb scattering of conduction subbands is stronger than that of the impurity band when the phonon interaction is dominant. The phonon-limited mobilities show the slowly declined tendency with temperature increasing above 100 K.

In conclusion, we have demonstrated the temperature dependence of effective mobility in impurity band and conduction subbands of the n-type junctionless silicon nanowire transistor. The minimum effective mobility of impurity band at the temperature of 10 K results from the interaction of thermal activation for electrons and impurity scattering. The electron effective mobility of the first subband in 2-fold valleys is higher than that of the second subband in 4-fold valleys. The maximum effective subband mobility at the low temperature is attributed to increased electron concentration and intersubband Coulomb scattering. It is found that the phonon scattering plays a dominant role in both impurity band and conduction subbands above the temperature of 100 K, leading to a slow decline in electron effective mobility.

The authors thank Mr. Li Xiao-Ming, Dr. Zhang Yan-Bo, Ma Liu-Hong, and Wang Hao for their technical support in device fabrication.