Amorphous indium–gallium–zinc–oxide thin-film transistors (a-IGZO TFTs) have been widely studied as prospective devices for next generation display applications due to high carrier mobility, low off-state leakage, low processing temperature, and good uniformity compared with conventional silicon-based TFTs.^[1–4] Due to the rapidly increasing demand for ultra-high resolution displays, scaling in a-IGZO TFTs is inevitable. In this case, the contact property between the source/drain electrodes and the a-IGZO channel plays an important role in the overall electrical performance of the TFTs, as the series contact resistance would become comparable to the channel resistance (R_CH) for short channel devices. In order to accurately model the contact properties of the TFTs, analysis of the total series contact resistance is no longer enough. It is necessary to separately extract the source and drain resistances (R_S and R_D), considering the asymmetric nature of R_S and R_D due to the difference in bias conditions and fabrication process variations. Until recently, only a few results have been reported on separate extraction of R_S and R_D in a-IGZO TFTs.^[5,6] Moreover, the validity of the extraction methods employed in those studies mostly relies on the accuracy of the equivalent circuit model used, while the underlying physics of contact asymmetry is less studied.

In this paper, the contact properties of a-IGZO TFTs is studied by imaging the potential profile of the TFT channel by using scanning Kelvin probe microscopy (SKPM). In this manner, R_S, R_D, and R_CH of an operating TFT at a series of bias conditions are extracted. The underlying physics of the asymmetric nature of source and drain contact resistance is discussed.

Figure 1 illustrates the schematic diagram of the SKPM setup with the a-IGZO TFT under test. The inverted-staggered a-IGZO TFT is fabricated on heavily doped Si substrate, which is also served as bottom gate. A 40-nm a-IGZO active layer is deposited by dc sputtering on a 200-nm PECVD SiO_x gate insulator. The active region of the TFT is then defined by photolithography and wet chemical etching. Next, Au/Ti (40 nm/10 nm) stacked S/D electrodes are deposited by e-beam evaporation and defined by the lift-off technique. Finally, the whole device is thermally annealed at 200 °C in air. The channel width (W) and length (L) of the measured TFT are 200 μm and 10 μm, respectively. The TFT works in enhancement mode with a sub-threshold swing of 0.23 V/dec, threshold voltage (V_th, the gate to source voltage where normalized drain current LI_DS/W reaches 1 nA) of 1.98 V and field effective mobility of 6.80 cm²·V⁻¹·s⁻¹.

The SKPM measurement is conducted using the surface potential mapping mode of an atomic force microscope (AFM) with a Pt-coated tip (diameter= 30 nm). The topography of the sample is measured under conventional non-contact mode with a working frequency of ω_m, which is approximately equal to the resonance frequency of the cantilever, while the synchronous measurement of the surface potential is realized by applying an additional alternative voltage V_DC+V_AC sin(ω_et) (ω_e < ω_m) to the tip. The electrostatic force between the tip and the sample can be expressed as^[7]

Fig. 1.

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	Fig. 1. Schematic diagram of the SKPM setup and the a-IGZO TFT under test.

In order to analyze the contact properties of the TFT at different working conditions, the surface potential across one certain section line along the TFT channel is measured repeatedly under a series of gate biases (V_GS). The TFT under test is biased by using a Keithley sourcemeter, which also records drain current (I_DS) of the TFT during the SKPM measurement. Under each gate bias, the surface potential measurement is repeated three times to confirm the repeatability. It is also worth noting that the back channel of the a-IGZO TFT is exposed to air during the SKPM measurement, which may introduce measurement errors due to the environment-related degradation effect of the TFT. To solve this, the transfer characteristics of the TFT are measured directly before and after the SKPM measurement. The field-effect mobility and sub-threshold swing of the TFT show no change, while the shift of threshold voltage is less than 0.5 V, indicating that environmental effect is negligible for this study.

Figure 2(a) shows the lateral topography of the TFT measured by AFM. The actual channel length and the S/D electrode thickness are 9.21 μm and 53 nm, respectively. Figure 2(b) shows a series of surface potential profiles along the TFT channel measured at different gate biases with a fixed drain voltage (V_DS) of 5 V. The shaded regions illustrate the topographic edges of the S/D electrodes. In order to eliminate the impact of channel-electrode work function difference and facilitate surface potential analysis, the potential profile measured at V_GS = V_DS = 0 V has been subtracted from all measured potential profiles of the operating TFT. It is clear that the potential profiles highlight the importance of contact resistance in the transport process of a working TFT, as a sharp potential drop is observed at the edge of source electrode when the TFT is turned on (V_GS>V_th). As mentioned before, the surface potential of the channel follows the potential contour of the whole channel when the TFT operates in the non-saturation region (V_GS−V_th>V_DS), which means that the cross section of the active layer along the width of the channel at any position x is an equipotential surface. As a result, the S/D resistance R_S and R_D of the TFT operating in the non-saturation region can be calculated by dividing the voltage drop at S/D contacts (see Figs. 3(a1) and 3(a2)) by I_DS for each gate bias, i.e., R_S,D = ΔV_S,D/I_DS, which is also known as the “microscopic contact resistance”.^[13,14] The channel resistance is then derived as R_CH = V_DS/I_DS − R_S − R_D.

Fig. 2.

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Fig. 2. (a) Surface topography of the a-IGZO TFT along the channel length. (b) Surface potential profiles of the a-IGZO TFT with VDS = 5 V and VGS increases from 1 V to 15 V (each profile curve is sequentially offset by 1 V for clarity). The shaded regions depict the topographic edges of the S/D electrodes. The lines in blue indicate the potential profiles for TFTs working in the non-saturation region (VGS−Vth>VDS) while the lines in orange indicate the potential profiles for TFTs working in the saturation region (VGS−Vth ≤ VDS).

Fig. 3.

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	Fig. 3. (a1) and (a2) Surface potential VSP profiles near the edge of electrodes of the a-IGZO TFT. The shaded regions depict the topographic edges of the S/D electrodes. The voltage drops at drain and source contacts are highlighted. (b) Channel, source, and drain resistance as a function of gate bias voltage of the TFT.

The gate bias dependence of R_CH, R_S, and R_D is illustrated in Fig. 3(b). It is clear that R_CH decreases with increasing V_GS. That is, by applying a larger V_GS, the gate-voltage-induced carrier concentration in the TFT channel increases and the active layer becomes more conductive. The variation of R_S and R_D as a function of V_GS follows the same trend, which is typical for bottom-gate a-IGZO TFTs.^[15] It is also clear that R_S is always larger than R_D for all applied gate biases. Device processing related structural asymmetry is firstly examined as a possible cause of this S/D contact asymmetry. The surface potential is measured in the same way with exchanged S/D terminals, which nevertheless results in the same observation. Thus, the contact resistance difference of S/D terminals should be intrinsic.

Generally speaking, the contact resistance of a working TFT is affected by both the bulk resistance of the semiconductor underneath the contact metal and the interface properties of the contact itself. Because both R_S and R_D decrease at higher V_GS just as R_CH does, it means that the contact resistance is closely related to the bulk resistance of a-IGZO under the electrodes. This is easy to understand: as in staggered TFT structures, electrons in the channel accumulation layer have to travel across the bulk IGZO after being injected from the source electrode or before being collected by the drain electrode. However, since the gate-to-channel voltage decreases from source to drain, the bulk resistance at the source side should be smaller than that at the drain side. One would expect that R_S should be smaller than R_D if the bulk resistance is a dominant factor, which apparently contradicts the observation in this work. Therefore, other factors such as the interface properties of the a-IGZO and metal contacts should play an important role causing the S/D contact resistance asymmetry.

It has been reported that an Ti-oxide layer with a thickness of several nanometers can be formed at the IGZO–Ti interface due to the very high affinity of Ti with oxygen,^[16,17] and consequently, an oxygen deficient region would be formed on top of the a-IGZO layer by redox reaction.^[17,18] Accordingly, the band diagrams of the Ti–TiO_x–IGZO junction in different conditions are illustrated in Fig. 4. Figure 4(a) depicts the schematic band diagram of separated Ti, TiO_x, and a-IGZO layers. The electron affinity difference between a-IGZO (χ_IGZO = 4.16 eV^[19]) and TiO_x (χ_TiOx = 4.1 eV^[20]) is only 0.06 eV. The Fermi level position (E_C−E_F) of a-IGZO and TiO_x can be determined by E_C−E_F = kT ln (N_c/N_d), where the symbols have their common meaning. Here, N_c of TiO_x and a-IGZO are 4.3× 10²¹ cm^−3[21] and 5× 10¹⁸ cm⁻³,^[19] respectively, while the donor concentration (N_d) of TiO_x and the adjacent low-resistance a-IGZO is estimated as 1× 10¹⁸ cm^−3[22] and 1× 10¹⁷ cm⁻³, respectively. Then the calculated Fermi level position of a-IGZO and TiO_x are 0.102 eV and 0.218 eV below E_C, respectively. Considering the small difference in electron affinity values and Fermi level positions of a-IGZO and TiO_x, there should be no obvious energy barrier for electron transport across the a-IGZO and TiO_x interface. On the other hand, the work function of Ti (ϕ_Ti = 4.33 eV^[23]) is considerably larger than the electron affinity of TiO_x. Thus, as shown in Fig. 4(b), a Schottky barrier would be formed with a barrier height Φ_b = 0.23 eV when Ti is in direct contact with TiO_x. Certainly, the actual value of Φ_b is also affected by interface charge density. The depletion region width (w) of a Schottky junction can be calculated by w = [2ɛ_s(Φ_bi+V_a)/qN_d]^1/2, where V_a is the applied bias voltage across the junction, ɛ_s and Φ_bi are the dielectric constant and build-in potential of the semiconductor, respectively. Considering the band diagram of the source contact (Fig. 4(c)), when positive V_DS is applied, the TiO_x–Ti Schottky junction is reversely biased. As a result, the depletion region would extend deep into the semiconductor layer, raising the resistance of the corresponding region. Assuming that the thickness of the TiO_x layer is 5 nm and the voltage drop across the junction is 1 V, and taking ɛ_s,IGZO = 11.5ɛ₀,^[24] ɛ_s,TiOx = 70ɛ₀,^[22] the entire TiO_x layer and the underlying a-IGZO layer would be fully depleted. For the case of the drain contact, as illustrated in Fig. 4(d), the originally small potential barrier (Φ_bi = 0.012 eV) for electron injecting from semiconductor to electrode can be nullified by the V_DS applied, making the contact more ohmic. As a result, electrons can be easily collected by the drain electrode. Here it is also worth noting that the TiO_x and a-IGZO layer are both n-type in nature. Thus, the applied voltage is unlikely to bend the conduction band of the semiconductor further upward to form an electron accumulation layer. The voltage drop across the junction should then be small and almost constant, which is in agreement with the potential profiles measured at high V_GS in Fig. 3(a).

Fig. 4.

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	Fig. 4. Schematic energy band diagrams near the Ti and a-IGZO interface: (a) for separated system; (b) for contact without bias voltage; (c) for source contact where a reverse bias is applied, and (d) for drain contact where a forward bias is applied.

Fig. 5.

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	Fig. 5. Distribution of channel resistance per unit length r of the TFT with VDS = 5 V and VGS increasing from 7 V to 15 V. The shaded regions illustrate the topographic edges of the S/D electrodes.

The validity of the proposed Ti–TiO_x–IGZO Schottky-like contact model can be further supported by the resistance distribution along the channel. The channel resistance per unit length at position x can be expressed as . As shown in Fig. 5, the resistance around the central channel region basically decreases from the drain side to the source side at different gate biases. However, a low resistance region near the drain electrode is clearly observed, which is a good indicator for the existence of a Ti-oxidation-induced oxygen-deficient region in a-IGZO, as it is known that the conductivity of a-IGZO is in positive correlation with the concentration of oxide vacancies. Meanwhile, at the source side, since the oxygen-deficient region of a-IGZO near the IGZO–TiO_x interface is depleted, the low resistance region near the edge of the source electrode is absent.

In summary, based on an SKPM technique, the source and drain contact resistance of a working a-IGZO TFT with Ti-based S/D contact are separately extracted under different biasing conditions. The source and drain contact resistances are both found to decrease with gate voltage increasing, while the resistance of the source contact is always smaller than that of the drain contact. The asymmetry of S/D contact resistance is attributed to the difference in biasing conditions of the Schottky-like junction induced by the parasitic reaction of the Ti electrode and a-IGZO, which is confirmed by analyzing the channel resistance distribution. The overall contact resistance should be determined by both the bulk channel resistance under the contact electrodes and the properties of the metal-semiconductor junction at the contact interface. In future development, the interfacial oxidation mechanism of the metal electrode should be given more attention, or another metallization scheme should be used. The contact region of the active layer could be intentionally doped to reduce the depletion region width, which is helpful to reduce the overall contact resistance.