Simulation study of device physics and design of GeOI TFET with PNN structure and buried layer for high performance

doi:10.1088/1674-1056/ab99b5

中国物理B ›› 2020, Vol. 29 ›› Issue (10): 107401-.doi: 10.1088/1674-1056/ab99b5

Bin Wang(王斌)¹^,†(), Sheng Hu(胡晟)¹, Yue Feng(冯越)¹, Peng Li(李鹏)², Hui-Yong Hu(胡辉勇)¹, Bin Shu(舒斌)¹

收稿日期:2020-04-23 修回日期:2020-05-26 接受日期:2020-06-05 出版日期:2020-10-05 发布日期:2020-10-05
通讯作者: Bin Wang(王斌)

Simulation study of device physics and design of GeOI TFET with PNN structure and buried layer for high performance

Bin Wang(王斌)^1,†, Sheng Hu(胡晟)¹, Yue Feng(冯越)¹, Peng Li(李鹏)², Hui-Yong Hu(胡辉勇)¹, and Bin Shu(舒斌)¹

¹ State Key Discipline Laboratory of Wide Bandgap Semiconductor Technology, School of Microelectronics, Xidian University, Xi’an 710071, China
² Xi’an Microelectronic Technology Institute, Xi’an 710054, China

Received:2020-04-23 Revised:2020-05-26 Accepted:2020-06-05 Online:2020-10-05 Published:2020-10-05
Contact: ^†Corresponding author. E-mail: wbin@xidian.edu.cn
About author:
†Corresponding author. E-mail: wbin@xidian.edu.cn
* Project supported by the National Natural Science Foundation of China (Grant No. 61704130), the Science Research Plan in Shaanxi Province, China (Grant No. 2018JQ6064), and the Science and Technology Project on Analog Integrated Circuit Laboratory, China (Grant No. JCKY2019210C029).

摘要/Abstract

Abstract:

Large threshold voltage and small on-state current are the main limitations of the normal tunneling field effect transistor (TFET). In this paper, a novel TFET with gate-controlled P⁺N⁺N⁺ structure based on partially depleted GeOI (PD-GeOI) substrate is proposed. With the buried P⁺-doped layer (BP layer) introduced under P⁺N⁺N⁺ structure, the proposed device behaves as a two-tunneling line device and can be shut off by the BP junction, resulting in a high on-state current and low threshold voltage. Simulation results show that the on-state current density I_on of the proposed TFET can be as large as 3.4 × 10⁻⁴ A/μm, and the average subthreshold swing (SS) is 55 mV/decade. Moreover, both of I_on and SS can be optimized by lengthening channel and buried P⁺ layer. The off-state current density of TTP TFET is 4.4 × 10⁻¹⁰ A/μm, and the threshold voltage is 0.13 V, showing better performance than normal germanium-based TFET. Furthermore, the physics and device design of this novel structure are explored in detail.

Key words: Ge-based TFET, two line tunneling paths, point tunneling, on-state current density

中图分类号: (Tunneling phenomena: single particle tunneling and STM)

74.55.+v

85.30.Tv (Field effect devices) 85.30.De (Semiconductor-device characterization, design, and modeling)

Bin Wang(王斌), Sheng Hu(胡晟), Yue Feng(冯越), Peng Li(李鹏), Hui-Yong Hu(胡辉勇), Bin Shu(舒斌). [J]. 中国物理B, 2020, 29(10): 107401-.

Bin Wang(王斌)†, Sheng Hu(胡晟), Yue Feng(冯越), Peng Li(李鹏), Hui-Yong Hu(胡辉勇), and Bin Shu(舒斌). Simulation study of device physics and design of GeOI TFET with PNN structure and buried layer for high performance[J]. Chin. Phys. B, 2020, 29(10): 107401-.

图/表 13

参考文献 29

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Parameter	TTP TFET	PNN TFET
Gate length L_ch/nm	100	100
Channel doping/cm⁻³	1 × 10¹⁹	1 × 10¹⁹
HfO₂ thickness T_ox/nm	3	3
Buried layer length L_BP/nm	50	−
Epitaxial layer doping N_epicm⁻³	1 × 10¹⁷	−
Buried doing N_BP/cm⁻³	1 × 10²⁰	−
Lightly doped region N_LD/cm⁻³	5 × 10¹⁸	−
Gate metal	aluminum	gold
Source/drain-metal	aluminum	aluminum
Source/drain-doping/cm⁻³	1 × 10²⁰	1 × 10²⁰

Simulation study of device physics and design of GeOI TFET with PNN structure and buried layer for high performance

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