Fermi level pinning effects at gate-dielectric interfaces influenced by interface state densities

doi:10.1088/1674-1056/24/10/107306

中国物理B ›› 2015, Vol. 24 ›› Issue (10): 107306-107306.doi: 10.1088/1674-1056/24/10/107306

• CONDENSED MATTER: ELECTRONIC STRUCTURE, ELECTRICAL, MAGNETIC, AND OPTICAL PROPERTIES • 上一篇下一篇

Fermi level pinning effects at gate-dielectric interfaces influenced by interface state densities

洪文婷, 韩伟华, 吕奇峰, 王昊, 杨富华

Engineering Research Center for Semiconductor Integration Technology, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China

收稿日期:2015-04-27 修回日期:2015-05-26 出版日期:2015-10-05 发布日期:2015-10-05
基金资助:
Project supported by the National Natural Science Foundation of China (Grant Nos. 61376096, 61327813, and 11234007).

Fermi level pinning effects at gate-dielectric interfaces influenced by interface state densities

Hong Wen-Ting (洪文婷), Han Wei-Hua (韩伟华), Lyu Qi-Feng (吕奇峰), Wang Hao (王昊), Yang Fu-Hua (杨富华)

Engineering Research Center for Semiconductor Integration Technology, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China

Received:2015-04-27 Revised:2015-05-26 Online:2015-10-05 Published:2015-10-05
Contact: Han Wei-Hua E-mail:weihua@semi.ac.cn
Supported by:
Project supported by the National Natural Science Foundation of China (Grant Nos. 61376096, 61327813, and 11234007).

摘要/Abstract

摘要： The dependences of Fermi-level pinning on interface state densities for the metal-dielectric, ploycrystalline silicon-dielectric, and metal silicide-dielectric interfaces are investigated by calculating their effective work functions and their pinning factors. The Fermi-level pinning factors and effective work functions of the metal-dielectric interface are observed to be more susceptible to the increasing interface state densities, differing significantly from that of the ploycrystalline silicon-dielectric interface and the metal silicide-dielectric interface. The calculation results indicate that metal silicide gates with high-temperature resistance and low resistivity are a more promising choice for the design of gate materials in metal-oxide semiconductor (MOS) technology.

关键词: interface state density, Fermi-level pinning, MIS structure, effective work function

Abstract: The dependences of Fermi-level pinning on interface state densities for the metal-dielectric, ploycrystalline silicon-dielectric, and metal silicide-dielectric interfaces are investigated by calculating their effective work functions and their pinning factors. The Fermi-level pinning factors and effective work functions of the metal-dielectric interface are observed to be more susceptible to the increasing interface state densities, differing significantly from that of the ploycrystalline silicon-dielectric interface and the metal silicide-dielectric interface. The calculation results indicate that metal silicide gates with high-temperature resistance and low resistivity are a more promising choice for the design of gate materials in metal-oxide semiconductor (MOS) technology.

Key words: interface state density, Fermi-level pinning, MIS structure, effective work function

中图分类号: (Metal-insulator-semiconductor structures (including semiconductor-to-insulator))

73.40.Qv

85.30.Tv (Field effect devices) 73.30.+y (Surface double layers, Schottky barriers, and work functions)

洪文婷, 韩伟华, 吕奇峰, 王昊, 杨富华. Fermi level pinning effects at gate-dielectric interfaces influenced by interface state densities[J]. 中国物理B, 2015, 24(10): 107306-107306.

Hong Wen-Ting (洪文婷), Han Wei-Hua (韩伟华), Lyu Qi-Feng (吕奇峰), Wang Hao (王昊), Yang Fu-Hua (杨富华). Fermi level pinning effects at gate-dielectric interfaces influenced by interface state densities[J]. Chin. Phys. B, 2015, 24(10): 107306-107306.

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Fermi level pinning effects at gate-dielectric interfaces influenced by interface state densities

Fermi level pinning effects at gate-dielectric interfaces influenced by interface state densities

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