An analytic model for gate-all-around silicon nanowire tunneling field effect transistors

doi:10.1088/1674-1056/23/9/097102

›› 2014, Vol. 23 ›› Issue (9): 97102-097102.doi: 10.1088/1674-1056/23/9/097102

• CONDENSED MATTER: ELECTRONIC STRUCTURE, ELECTRICAL, MAGNETIC, AND OPTICAL PROPERTIES • 上一篇下一篇

An analytic model for gate-all-around silicon nanowire tunneling field effect transistors

刘颖^{a b}, 何进^{a b}, 陈文新^b, 杜彩霞^c, 叶韵^b, 赵巍^b, 吴文^b, 邓婉玲^b, 王文平^b

a School of Electronics and Computer Science, Peking University, Beijing 100871, China;
b Peking University Shenzhen SOC Key Laboratory, PKU-HKUST Shenzhen-Hong Kong Institution, Shenzhen 518057, China;
c Shenzhen Huayue Terascale Chip Electronic Limited Co. Ltd., Shenzhen 523620, China

收稿日期:2013-11-30 修回日期:2014-03-20 出版日期:2014-09-15 发布日期:2014-09-15
基金资助:
Project supported by the National Natural Science Foundation of China (Grant Nos. 61274096, 61204043, 61306042, 61306045, and 61306132), the Guangdong Natural Science Foundation, China (Grant Nos. S2012010010533 and S2013040016878), the Shenzhen Science & Technology Foundation, China (Grant No. ZDSY20120618161735041), and the Fundamental Research Project of the Shenzhen Science & Technology Foundation, China (Grant Nos. JCYJ20120618162600041, JCYJ20120618162526384, JCYJ20130402164725025, and JCYJ20120618162946025), and the International Collaboration Project of the Shenzhen Science & Technology Foundation, China (Grant Nos. GJHZ20120618162120759, GJHZ20130417170946221, GJHZ20130417170908049, and GJHZ20120615142829482).

An analytic model for gate-all-around silicon nanowire tunneling field effect transistors

Liu Ying (刘颖)^{a b}, He Jin (何进)^{a b}, Chan Mansun (陈文新)^b, Du Cai-Xia (杜彩霞)^c, Ye Yun (叶韵)^b, Zhao Wei (赵巍)^b, Wu Wen (吴文)^b, Deng Wan-Ling (邓婉玲)^b, Wang Wen-Ping (王文平)^b

a School of Electronics and Computer Science, Peking University, Beijing 100871, China;
b Peking University Shenzhen SOC Key Laboratory, PKU-HKUST Shenzhen-Hong Kong Institution, Shenzhen 518057, China;
c Shenzhen Huayue Terascale Chip Electronic Limited Co. Ltd., Shenzhen 523620, China

Received:2013-11-30 Revised:2014-03-20 Online:2014-09-15 Published:2014-09-15
Contact: He Jin E-mail:frankhe@pku.edu.cn
Supported by:
Project supported by the National Natural Science Foundation of China (Grant Nos. 61274096, 61204043, 61306042, 61306045, and 61306132), the Guangdong Natural Science Foundation, China (Grant Nos. S2012010010533 and S2013040016878), the Shenzhen Science & Technology Foundation, China (Grant No. ZDSY20120618161735041), and the Fundamental Research Project of the Shenzhen Science & Technology Foundation, China (Grant Nos. JCYJ20120618162600041, JCYJ20120618162526384, JCYJ20130402164725025, and JCYJ20120618162946025), and the International Collaboration Project of the Shenzhen Science & Technology Foundation, China (Grant Nos. GJHZ20120618162120759, GJHZ20130417170946221, GJHZ20130417170908049, and GJHZ20120615142829482).

摘要/Abstract

摘要： An analytical model of gate-all-around (GAA) silicon nanowire tunneling field effect transistors (NW-TFETs) is developted based on the surface potential solutions in the channel direction and considering the band to band tunneling (BTBT) efficiency. The three-dimensional Poisson equation is solved to obtain the surface potential distributions in the partition regions along the channel direction for the NW-TFET, and a tunneling current model using Kane's expression is developed. The validity of the developed model is shown by the good agreement between the model predictions and the TCAD simulation results.

关键词: gate-all-round nanowire tunneling field effect transistor, band to band tunneling, analytic model

Abstract: An analytical model of gate-all-around (GAA) silicon nanowire tunneling field effect transistors (NW-TFETs) is developted based on the surface potential solutions in the channel direction and considering the band to band tunneling (BTBT) efficiency. The three-dimensional Poisson equation is solved to obtain the surface potential distributions in the partition regions along the channel direction for the NW-TFET, and a tunneling current model using Kane's expression is developed. The validity of the developed model is shown by the good agreement between the model predictions and the TCAD simulation results.

Key words: gate-all-round nanowire tunneling field effect transistor, band to band tunneling, analytic model

中图分类号: (Semiconductor compounds)

71.20.Nr

73.43.Jn (Tunneling) 73.43.Cd (Theory and modeling) 73.25.+i (Surface conductivity and carrier phenomena)

刘颖, 何进, 陈文新, 杜彩霞, 叶韵, 赵巍, 吴文, 邓婉玲, 王文平. An analytic model for gate-all-around silicon nanowire tunneling field effect transistors[J]. , 2014, 23(9): 97102-097102.

Liu Ying (刘颖), He Jin (何进), Chan Mansun (陈文新), Du Cai-Xia (杜彩霞), Ye Yun (叶韵), Zhao Wei (赵巍), Wu Wen (吴文), Deng Wan-Ling (邓婉玲), Wang Wen-Ping (王文平). An analytic model for gate-all-around silicon nanowire tunneling field effect transistors[J]. Chin. Phys. B, 2014, 23(9): 97102-097102.

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An analytic model for gate-all-around silicon nanowire tunneling field effect transistors

An analytic model for gate-all-around silicon nanowire tunneling field effect transistors

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