Amorphous Si critical dimension structures with direct Si lattice calibration
Wu Ziruo1, Cai Yanni1, Wang Xingrui1, Zhang Longfei1, Deng Xiao2, †, Cheng Xinbin1, Li Tongbao1
School of Physics Science and Engineering, Tongji University, Shanghai 200092, China
School of Aerospace Engineering and Applied Mechanics, Tongji University, Shanghai 200092, China

 

† Corresponding author. E-mail: 1110490dengxiao@tongji.edu.cn

Project supported by the National Key Scientific Instrument and Equipment Development Projects of China (Grant No. 2014YQ090709), the National Key Research and Development Program of China (Grant No. 2016YFA0200902), and Major Projects of Science and Technology Commission of Shanghai, China (Grant No. 17JC1400800).

Abstract

Developing highly accurate critical dimension standards is a significant task for nanoscale metrology. In this paper, we put forward an alternative approach to fabricate amorphous Si critical dimension structures with direct Si lattice calibration in the same frame scanning transmission electron microscopy image. Based on the traceable measurement analysis, the optimized method can provide the same calibration accuracy and increase the fabrication throughput and lower the cost simultaneously, which benefits the application needs in atomic force microscopy (AFM) tip geometry characterization, benchmarking measurement tools, and conducting comparison measurements between different approaches.

1. Introduction

Accurate line width measurements require critical dimension (CD) standards which are traceable to the international system of units (SI).[1] As the miniaturization of nanodevices down to 7 nm node and beyond in semiconductor,[2] accurate and precise characterizations of CD, height, sidewall angle, line edge roughness (LER), line width roughness (LWR), and corner rounding are key tasks for the guarantee of nanostructure performance and process control.[35] According to the international technology roadmap for semiconductors (ITRS) metrology roadmap, the measurement uncertainty of physical CD needs to be as low as 0.7 nm in the year of 2024.[6] Therefore, there is an increasing need to develop new CD standards at sub-50 nm region with high accuracy.

Generally, atomic force microscopy (AFM), scanning electron microscopy (SEM), optical CD tools, and hybrid approaches are widely used to calibrate the dimensions of CD standards. Due to the intrinsic limitations of these measurement methods, such as tip geometry dilation and modeling errors, there are tool-to-tool matching errors and sample-to-sample measurement bias variations which are inevitable and reduce the accuracy.[7,8] In order to solve this problem, researchers have proposed to use well-calibrated CD standards to calibrate tip geometry, benchmark measurement tools, and conduct comparison measurements between different approaches/tools.[4,7,9]

The development of CD standards with the calibration of crystal lattice constant has been successfully demonstrated to be a new kind of well-calibrated CD standard.[10] And researchers have proved that it holds the same accuracy to be used as a new approach to realize traceability in nanoscale dimensional metrology.[4,1113] The typical crystal CD material is based on silicon. Figure 1(a) shows a design of crystal CD standard with direct Si lattice calibration, the CD value can be determined by counting the pixels in transmission electron microscopy (TEM) images together with the distance between neighbor Si (111) planes acting as an internal ruler.[3] However, normally this kind of CD structure is fabricated by electron beam lithography (EBL), which does not have a very high throughput and costs are high. Thus, an alternative method to fabricate CD standards at sub-50 nm with high throughput and low cost is demanded.

Fig. 1. (a) Design of crystal Si critical dimension standard with direct Si lattice calibration. (b) Design of amorphous Si critical dimension standard with direct Si lattice calibration.

Motivated by the aspects above, in this paper, we put forward an alternative method of fabricating amorphous Si critical dimensional structures with direct Si lattice calibration in the same frame of TEM image, which is illustrated in Fig. 1(b). The amorphous structure is fabricated with Si/SiO2 multilayer deposition and etching. Tortonese et al. have used the same method to create isolated Si line to produce CD standards,[1] but they compared the amorphous Si structure and crystal Si structure in different TEM images, which will bring an expanded error during the Si lattice calibration process. Our proposal can be treated as the optimization of Tortonese’s approach. In addition, it should be specified that our optimization approach (Fig. 1(b)) is equivalent to the EBL method (Fig. 1(a)). Because the CD structures both have oxidation layers on the surface in Figs. 1(a) and 1(b), the only difference is that the extract position of the crystal Si lattice is different. One is inside the CD structure, and the other is outside substrate structure. But both are from the same frame TEM image. Since the layer deposition for the CD structure fabrication can be conducted uniformly and simultaneously with a very big area (at both the wafer size level and multi-wafer), the optimized approach put forward in this paper will act as an alternative method to fabricate CD standards at sub-50 nm with high throughput and low cost.

2. Design and fabrication of the Si critical dimension structure

The concept of fabrication of Si critical dimension structure is based on converting the thickness of the deposition layer to the nominal CD value with the multilayer deposition of Si/SiO2. Here we introduce the multilayer deposition process to provide a complete picture of this technology. A single protruded Si structure can be used as a candidate for CD standards.

2.1. Multilayer deposition of Si/SiO2

Figure 2 shows the fabrication process of amorphous Si critical dimension structure based on multilayer method, which has ever successfully been used to fabricate 25 nm pitch standard.[1417] In this paper, we aim at fabricating a CD structure with a nominal value of 20 nm as an example to demonstrate our proposal. The deposition process is illustrated in Fig. 2(a), a group of 20 nm SiO2 layer and 20 nm Si layer is deposited on Si (111) wafer (4 inches) surface first by radio frequency magnetron sputtering technology. Then, a 300 nm SiO2 layer is followed to isolate the single CD structure. Afterwards, 40 cycles of 20 nm Si layer plus 20 nm SiO2 layer are deposited alternatively, which are designed to be used as guidance features for quick location during measurements. Finally, a 500 nm Si layer is deposited on the top to encapsulate the whole structures.

Fig. 2. Amorphous Si critical dimension structure fabrication based on multilayer deposition method: (a) alternative deposition of Si/SiO2 layers on Si (111) wafer, (b) amorphous Si critical dimension structure protrudes after selective wet etching process.

Two wafers are bonded together face to face with adhesives to make the CD structures located near the center for convenience of measurement.[18] The bonded pair is diced into small dies (2 mm × 2 mm × 2 mm cubes). After the small die is ground and fully polished, a HF acid solution of 2% concentration is used to etch the SiO2 layers to the designed depth and hereby the Si structure nearby the substrate protrudes to form the CD structure in Fig. 2(b).

2.2. Amorphous Si critical dimension structure

Figures 3(a) and 3(b) show the TEM images of amorphous Si critical dimension structure after selected wet etching. The TEM images are obtained by FEI Talos F200X instrument with an accelerating voltage of 200 kV and magnification of 8600 and 94000, respectively. The particular trench between the CD structure and the substrate was etched to a depth of approximately 200 nm, which indicates that the single CD structure will keep standing well with a high aspect ratio of 10 : 1. It should be noted that the CD structure tilts a little due to the high aspect ratio, therefore a suitable etching depth for specified CD structure should be controlled and related research is ongoing.

Fig. 3. (a) An overview TEM image of the multilayer structures after selective wet etching, (b) TEM image of the protruded CD structure with a high aspect ratio of about 10: 1, (c) AFM image (2 μm × 2 μm) of the multilayer structures including the CD structure, (d) averaging profile of AFM image of (c).

A well-calibrated CD structure is very useful to characterize the tip geometry for CD-AFM and to examine the modeling error for CD-SEM.[5,8] Here we show a commercial AFM image of the multilayer structures including the CD structure in Fig. 3(c). The AFM probe used here is RTESP from Bruker Nano Inc, with a typical tip radius of 8–12 nm, and the scanning mode is tapping. From the averaging profile of the AFM image in Fig. 3(d), it is obvious that a 20 nm CD structure is distinguishable with the AFM tip, and the detected depth of the trenches is around 10 nm because of the tip geometry influence. It should be noted that the gap between the CD structure and the substrate is less than the nominal value of 20 nm, which is caused by the etching rate difference between two sides of the CD structure. This asymmetry will cause the CD structure tilting. In order to reduce the tilting effect, we recommend an optimum condition of ultrasonic agitation, HF acid concentration, and lined width scale in the selective etching.[19] And as expected, the width of the CD structure is broadened because of the AFM tip dilation effect. Since the CD structure has a nearly 90° sidewall angle and the CD can be calibrated by lattice constant (to be elucidated in the next section) and be distinguishable by AFM, it can be a very good candidate to be used as an AFM tip characterizer to reconstruct the AFM tip width, front/back angles, and so on.

3. Traceable measurement of the critical dimension

Next, we begin to demonstrate the traceable measurement of the CD structure based on Si lattice constant. The spacing in undoped Si (111) is 313.56011(17) pm[13,20] according to the precise x-ray measurement. Because in the high magnification TEM measurement mode, the lattice periodicity can be resolved in the interference pattern of transmission electron beams, the image scale can be traced back to the SI unit. Since the 20 nm amorphous CD structure and the crystal Si (111) substrate are detected in the same frame of TEM image, it will realize the amorphous Si critical dimension structures with direct Si lattice calibration.

3.1. TEM measurements

Figures 4(a) and 4(b) show the high-resolution STEM images (observed by FEI Talos F200X) of the protruded CD structure and the Si (111) substrate. The TEM images are obtained by FEI Talos F200X instrument with an accelerating voltage of 200 kV and magnification of 94000 to 820000. In Fig. 4(a), both the CD structure and Si (111) planes are resolved in the interference pattern within the same frame TEM image as we designed from the beginning. Since our proposal must obtain the CD structure and the substrate lattice in the same frame, it is suggested the CD structure fabricated to be lower than 50 nm. As the scaling down of nanodevice dimensions, CD structures at the sub-50 nm region where we focus will be very important.

Fig. 4. STEM images of different parts of multilayer structures: (a) CD structure together with the Si (111) substrate, (b) Si (111) substrate, (c) deposition layer for CD with Si (111) substrate in the bulk.

Low LER and LWR levels are very significant factors for the uniformity of a CD standard. Figure 4(c) shows the STEM image of the deposition layer for CD with Si (111) substrate in the bulk. From the prospective of a qualitative view, it is obvious that the line edge pair of the CD structure is almost parallel to the Si (111) surface, which indicates a very low LER/LWR of the amorphous Si critical dimension structure. Ideally speaking, the LER should be treated as the replication of the surface roughness, therefore the LWR is only determined by the oxidation thickness variation. The low LER/LWR advantage of CD structure fabricated by multilayer will be beneficial to guarantee good uniformity to be used as a CD candidate.

3.2. Evaluation of critical dimension based on the lattice constant

To accurately evaluate the critical dimension parameters based on the lattice constant, the most challenging issue is how to accurately assign the feature edges in the high-resolution STEM images.[11] Now it has been common sense that the feature edge detection will contribute the biggest uncertainty source for the CD structure evaluation. However, previous research agreed that the contribution caused by line edge definition can be controlled under 0.3 nm.[11,21] And it is suggested that the half intensity position is a good choice to define the SiOX–air boundary. Here we introduce our first simple and fast evaluation of the designed amorphous Si critical dimension structures. A detail evaluation of the uncertainty of CD including the line edge detection, repeatability, pixel size calculation, inclination angle, is under research and we will release the corresponding results.

Figure 5(a) is a reproduction of STEM image of CD after contrast adjustment from Fig. 4(a) with a magnification of 500000. Figure 5(b) is the image intensity profile of the STEM image at specified line (marked red) along the Y axis in Fig. 5(a) with twenty lines averaging to reduce the noise. As illustrated in Fig. 1(b), we count the pixel number of the critical dimension N1 and obtain the pixel number between two neighbor Si (111) planes first. Then the CD value at a specified line along the Y axis is calculated by N1a111/N2, where a111 is a constant equal to 0.3136 nm. The CD values in Fig. 5(a) at Y = 400, 500, 600, 700, and 800 are 20.9 nm, 21.0 nm, 21.2 nm, 20.8 nm, and 21.3 nm, respectively, yielding an average CD of 21.0 ± 0.2 nm. The 0.2 nm uncertainty agrees well with previous study that the uncertainty can be controlled less than 0.3 nm.[11] According to the previous study,[21] the bias of threshold level of edge detection, the deviation of pixel size calculation, and the repeatability of lined width measurements contribute the main parts of the uncertainty of the line width. A detail analysis of line width uncertainty is under investigation to elucidate the strategy of lowering the uncertainty by optimizing the evaluation process. Therefore, as expected, the optimized proposal we put forward by using amorphous Si critical dimension structures can be used as an alternative method to produce CD standards with high throughput and the same accuracy. In addition, apart from the various applications in material and physical science,[22,23] the optimized proposal broadens the application of transmission electron microscopy in the metrology area.

Fig. 5. (a) Reproduction of STEM image of CD after contrast adjustment, (b) image intensity profile of STEM image at specified line (Y = 700) along the Y axis in (a).
4. Conclusion

We demonstrate an optimized method by using the Si lattice structures within the same frame STEM images to define the amorphous Si critical dimension structures. The results indicate that this novel approach will not only provide the same traceable measurement accuracy with the previous crystal CD method, but also increase the throughput and lower the parallel fabrication cost. Amorphous Si critical dimension structures with direct Si lattice calibration will offer convenience for calibrating tip geometry, benchmarking measurement tools, and conducting comparison measurements between different approaches/tools.

Reference
[1] Tortonese M Lorusso G Blanquies R Prochazka J Grella L 2004 Metrology, Inspection, and Process Control for Microlithography Xviii, Pts 1 and 2, February 23–26, 2004 Santa Clara, CA 10.1117/12.916680
[2] IBM Research Alliance Produces Industry’s First 7nm Node Test Chips https://www-03.ibm.com/press/us/en/pressrelease/47301.wss
[3] Dai G Heidelmann M Kübel C Prang R Fluegge J Bosse H 2013 Meas. Sci. Technol. 24 085001
[4] Dai G L Zhu F Heidelmann M Fritz G Bayer T Kalt S Fluegge J 2015 Meas. Sci. Technol. 26 115006
[5] Dai G L Hahm K Bosse H Dixson R G 2017 Meas. Sci. Technol. 28 065010
[6] Hoefflinger B 2011 ITRS: The International Technology Roadmap for Semiconductors 161 174
[7] Ukraintsev V Banke B 2012 J. Micro-Nanolithography Mems Moems 11 011010
[8] Hussain D Ahmad K Song J M Xie H 2017 Meas. Sci. Technol. 28 012001
[9] Tondare V N Villarrubia J S Vladár A E 2017 Microsc. Microanalysis 23 967
[10] Dixson R G Allen R A Guthrie W F Cresswell M W 2005 J. Vac. Sci. & Technol. 23 3028
[11] Dai G Koenders L Fluegge J Bosse H 2016 Opt. Eng. 55 091407
[12] Takamasu K Okitou H Takahashi S Konno M Inoue O Kawada H 2011 Metrology, Inspection, and Process Control for Microlithography Xxv, Pt 1 and Pt 2, February 28–March 3, 2011 San Jose, CA 10.1117/12.879036
[13] Orji N G Dixson R G Garcia-Gutierrez D I Bunday B D Bishop M Cresswell M W Allen R A Allgair J A 2016 J. Micro-Nanolithography Mems Moems 15 044002
[14] Ito Y Omote K Okazaki Y Nakayaka Y Kawada H 2010 Metrology, Inspection, and Process Control for Microlithography Xxiv, February 22–25, 2010 San Jose, CA 10.1117/12.846519
[15] Misumi I Kitta J Fujimoto H Gonda S Azuma Y Maeda K Kurosawa T Ito Y Omote K Nakayama Y Kawada H 2012 Meas. Sci. Technol. 23 0150002
[16] Misumi I Dai G L Lu M Z Sato O Sugawara K Gonda S Takatsuji T Danzebrink H U Koenders L 2010 Meas. Sci. Technol. 21 035105
[17] Misumi I Lu M Tanaka H Sugawara K Gonda S Kurosawa T 2008 Meas. Sci. Technol. 19 045101
[18] Wang X R Cheng X B Zhang L F Deng X Li T B 2018 Aip Adv. 8 8
[19] Zhang L Wang X Cheng X Deng X 2018 J. Micro-Nanolithography Mems Moems 17 1
[20] Massa E Mana G Kuetgens U Ferroglio L 2009 New J. Phys. 11 053013
[21] Takamasu K Okitou H Takahashi S Konno M Inoue O Kawada H 2012 Metrology, Inspection, and Process Control for Microlithography Xxvi, Pts 1 and 2, Februry 13–16, 2012 San Jose, CA 10.1117/12.916680
[22] Zhang Y L 2009 Physics 38 401
[23] Tong Y X Zhang Q H Gu L 2018 Chin. Phys. 27 066107