Graphene has attracted significant attention as a potential emerging semiconductor material for future electronics due to its excellent physical and electrical properties, such as the outstanding carrier mobility, high current density, large mechanical strength, excellent thermal conductivity, etc.^[1–3] Over the past ten years, a number of advances in graphene based devices have been made. A intrinsic cutoff frequency (f_T) of 427 GHz with 67-nm gate length graphene field-effect transistor (GFET) has been reported for peeled graphene.^[4] Recently, 100-nm gate length epitaxial graphene transistor fabricated on SiC substrate has exhibited an intrinsic f_max of 137 GHz.^[5] Several other significant efforts have also been made to improve the device performance and develop new graphene-based applications,^[6–9] such as graphene nanoribbons, terahertz devices, photodetectors, and other graphene-based devices and circuits. In practical applications, however, graphene devices demand not only good operation performances but also thermal stabilities. Thermal effects, including self-heating generated during device operation and ambient temperature variations, will strongly affect the characteristics of devices, leading to degradations of device performances. Therefore it is very important to understand the operation mechanisms of graphene devices at different temperatures.

Many groups have reported on the temperature dependent characteristics of graphene devices at relatively low temperatures, typically ranging from ∼1.5 K to 380 K.^[10–12] For example, Bolotin et al. investigated the temperature-dependent transport in suspended graphene in a temperature range 5 K < T < 240 K.^[11] Feng et al. studied the temperature-dependent electrical properties of GFETs in ambient atmosphere with temperature rising from 300 K to 380 K.^[12] These early studies gave an insight into the understanding of the basic physical and electronic properties of graphene. In many practical applications, devices often work under different kinds of high temperature conditions, such as the temperature above 100 °C. It is important to investigate the behaviors of graphene devices under high temperature. But few reports on high temperature performances of graphene devices can be found in the literature.

In this work, bilayer epitaxial GFETs are fabricated on 4H–SiC substrate. The DC performances of graphene devices are studied at the temperatures ranging from 25 °C to 200 °C. The operation mechanisms and thermal stabilities of GFETs under high temperature are investigated.

Epitaxial graphene layers were synthesized on 10 mm × 10 mm semi-insulating Si-face 4H–SiC (0001) substrates. Prior to the graphene growth, the substrates were hydrogen etched at 1650 °C to form a regularly stepped surface. Monolayer graphene was grown on the SiC substrate in Ar ambient at 1650 °C. Then, the as-grown graphene was annealed in molecular hydrogen atmosphere at 900 °C, which can result in the formation of the bilayer quasi-free-standing epitaxial graphene (QFSEG). More details of the growth can be found in our early work.^[13,14] The as-grown bilayer epitaxial graphene shows p-type doping with carrier density n_s = 1.41 × 10¹³ cm⁻², Hall mobility μ = 3110 cm²/V·s, and sheet resistance R_sheet = 142.3 Ω/□. In this work, bilayer QFSEG was used to fabricate the graphene devices.

An improved device process is used to fabricate GFETs, in which an Au metal film was pre-deposited on graphene surface as a protection layer to avoid undesired damage and contamination to graphene during processing. A similar process flow can be found in our previous work^[5,15] and is summarized as follows. First, a 20-nm Au metal film was deposited on the surface of bilayer epitaxial graphene on SiC substrate. Channel region was then patterned by optical lithography and Au film outside the channel was removed by KI-I₂ etchant solution. Electrical isolation was achieved by exposure of the graphene surface to oxygen plasma. The metal electrodes (Ti/Au, 10 nm/250 nm) were evaporated at the top of the Au film followed by a lift-off process. The exposed Au layer between metal electrodes was wet etched away to form the valid source/drain separations automatically. The devices were equipped in an electronbeam evaporator to deposit 2-nm Al nucleation layer. Then, 20-nm Al₂O₃ film was deposited on the surface of device via the Atomic layer deposition (ALD) at 250 °C. Rapid thermal annealing at 400 °C for 2 min in nitrogen was conducted to improve the quality of the Al₂O₃ film.^[16] Finally a 250-nm Al top-gate electrode was thermally evaporated and a lift-off process was performed.

Raman spectrum of bilayer epitaxial graphene on SiC substrate is shown in Fig. 1(a). The full width of half maximum (FWHM) of two-dimensional (2D) peak is ∼59 cm⁻¹, and the 2D band can be divided into four Lorentzian sub-bands, which is the evidence for bilayer structure of graphene.^[17] An inset of Fig. 1(a) shows the morphology of graphene surface characterized by atomic force microscopy (AFM), revealing smooth and wide terrace which is around 19 μm. Figure 1(b) shows a schematic diagram of top-gated GFET on SiC substrate. The device structure consists of a graphene channel that is gated through Al₂O₃ dielectric from the top gate. Optical microscope image of GFET is shown in Fig. 1(c) with a gate length (L_g) of 1.2 μm and a gate width (W_g) of 2 μm.

Fig. 1.

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	Fig. 1. (a) Raman spectrum of bilayer epitaxial graphene on 4H–SiC (0001). An inset shows the AFM image of bilayer graphene on SiC with a smooth terrace width of about 19 μm. The scanning area is 30 μm × 30 μm. (b) A schematic drawing of top-gated GFET. (c) Optical micrograph of top-gated GFET. The gate length (Lg) and gate width (Wg) are 1.2 μm and 2 μm, respectively. The scale bar is 10 μm.

Figures 2(a) and 2(b) show the variations of drain-source current (I_DS) with drain-source voltage (V_DS) scanned from 0 to −2 V for gate biases (V_G) ranging from −8 V to +8 V at different temperatures (from 25 °C to 200 °C in steps of 25 °C). The bilayer graphene device shows p-type characteristic. The maximum I_DS (defined at V_DS = − 2 V and V_G = −8 V) decreases with increasing temperature and drops from 2.36 A/mm to 2.07 A/mm as temperature increases from 25 °C to 200 °C. When increasing the V_G to +8 V, the I_DS shows a weak temperature dependence, and the minimum I_DS (V_DS = − 2 V, V_G = +8 V) shows no obvious change with temperature. Figure 2(c) shows the curves of transfer characteristics and g_m at V_DS = − 2 V with V_G scanned from −8 V to +8 V at various temperatures. Both I_DS and g_m decrease with increasing temperature, indicating degeneration of device performance under high temperature environment. It is seen that at the V_G of −8 V, I_DS decreases obviously with the increase of temperature, but has little change at the V_G of +8 V (near the charge neutrality point), which is similar to the phenomenon as mentioned above in curves of I_DS–V_DS. To investigate the temperature-dependent I_DS of GFET over different values of V_G, the variations of I_DS are quantitatively calculated as shown in Fig. 2(d). The value of variation in I_DS is defined as θ = ((I_{DS − 25 °C} − I_DS−200°C)/I_{DS−25 °C}) × 100%. At the V_G of −8 V, a reduction of 12.58% is observed from 25 °C to 200 °C, while at the V_G of +8 V, the reduction is only as small as 0.88%. A similar phenomenon has been seen in several theoretical and experimental studies.^[11,18,19] An inset in Fig. 2(d) shows the energy-band diagram of graphene with V_G swept from −8 V to +8 V. For graphene at high carrier density, the temperature-dependent scattering effect becomes prevailed, which leads to a metallic behavior (∂σ/∂T < 0, σ = neμ) of the graphene channel conductance. While in a low carrier density region (at or close to the Dirac point), thermal activation of charge carriers in electron-hole puddles originating from potential fluctuations associated with randomly distributed charged impurities plays a very important role, which gives rise to the increase of carrier density and results in a semiconducting behavior (∂σ/∂T > 0).

Fig. 2.

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	Fig. 2. (a) and (b) Temperature-dependent IDS–VDS characteristics of a GFET. (c) Temperature-dependent IDS–VG and gm at VDS = − 2 V. (d) The calculated value of θ as a function of VG for GFET. Inset shows the gate voltage dependence of Fermi level (EF) of graphene.

For our device, when V_G = −8 V, a high carrier density regime is formed in the channel of graphene. Thermal activation of electron-hole puddles is exponentially suppressed at this time, and the scattering effect plays a major role and dominates the channel of graphene. Hence the I_DS (σ·E) of GFET decreases obviously with increasing temperature, and 12.58% reduction of I_DS is observed under 200 °C with V_G = −8 V. The gate voltage is scanned from negative to positive voltage, and the number of carriers in the channel is reduced, and I_DS shows a continuous drop with V_G increasing. At a V_G of +8 V, a relatively low carrier density regime is formed in the graphene channel and the thermal activation will dominate. It is needed to point out that to avoid the electrical breakdown of Al₂O₃ dielectric the bias applied to the gate does not exceed +8 V. The Dirac point is not reached in this measurement for our device. Dirac point is larger than +8 V, implying that the carrier density under V_G of +8 V is not low enough and a pure semiconducting behavior cannot be present here. It is observed in Fig. 2(d) that the I_DS shows a small reduction of 0.88% under a V_G of +8 V at a temperature of 200 °C. The reduction indicates that a weak metallic behavior is still maintained in the graphene channel. This phenomenon is the result of the competing interactions between physical mechanisms of scattering and thermal activation, indicating that scattering has a stronger influence on the carrier of graphene than the thermal activation. Hence, only a little reduction of I_DS is observed under the condition of V_G = +8 V in the device.

It is important to note that the maximum I_DS of GFET is only reduced by 12.58% after the temperature increasing from 25 °C to 200 °C. This value of reduction in the GFET is significantly smaller than those of other traditional semiconductors (e.g., silicon, GaN, etc.) devices. It is reported that a very large reduction of about 61% for the maximum I_DS is observed in GaN-based MOSFET after the temperature rising from 25 °C to 200 °C.^[20] To give an insight into the reasons for this small I_DS reduction, the temperature-dependent scattering effect is used to investigate the operation mechanisms of GFETs. I_DS can be determined using the following expression:

The temperature dependences of the four kinds of scatterings are different. The strength of short range scattering depends on the quality of the graphene sample. The μ_sr is a constant and temperature independent. The μ_c shows a proportional relationship with temperature. Owing to the parabolic band structure of the bilayer graphene, the energy averaging of the Coulomb scattering time can result in the mobility increasing proportionally with temperature. The acoustic phonon scattering of graphene is inversely proportional to temperature, which results in the mobility decreasing with temperature. The carrier in the graphene will also be scattered by optical phonons of SiC substrates and Al₂O₃ dielectric, which results in the mobility decreasing with temperature. The competition result between Coulomb scattering and acoustic phonon scattering of graphene, and the remote phonon (RP) scattering of substrates/dielectric cause a relatively small decrease of μ at high temperature, which leads to the slight reduction of I_DS in the GFETs. The above analysis indicates that the small decrease of μ at high temperature lies in the increase of Coulomb scattering mobility with temperature rising due to its parabolic band structure of bilayer graphene. The bilayer graphene transistors show some advantages in high temperature applications.

In order to further investigate the performance of GFET under high temperature, the thermal stability test is conducted in this work. The measurement is carried out under 200 °C in air ambience. The output characteristics of a GFET at different heating times are shown in Fig. 3(a). It is observed that the graphene device exhibits almost unchanged performance after high temperature measurements at 200 °C for 5 hours. Figure 3(b) shows the results of the maximal I_DS and g_m versus time, demonstrating a long-term thermal stability for bilayer graphene device.

Fig. 3.

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	Fig. 3. (a) IDS–VDS characteristics of GFET for 0 hour and 5 hour 35 min latter under 200 °C in ambient. (b) The maximum IDS and gm versus time.

In this paper, high temperature DC performances of bilayer epitaxial graphene devices on SiC substrate are studied. When graphene channel has a high carrier density, the I_DS decreases obviously with temperature increasing, but it has little change when graphene channel has a low carrier density. The competing interactions between scattering and thermal activation are responsible for the different reduction tendencies. The competition result between Coulomb scattering and acoustic phonon scattering of graphene, and the remote phonon (RP) scattering of substrates/dielectric cause a relatively small decrease of μ at high temperature, which leads to the slight reduction of I_DS in the GFETs. In addition, the device maintains almost unchanged DC performance under 200 °C in air ambience for 5 hours, demonstrating the high thermal stabilities for bilayer graphene devices. These results are meaningful and will promote the development of graphene-based devices for practical applications in the future electronics.