Ambipolar performance improvement of the C-shaped pocket TFET with dual metal gate and gate-drain underlap

doi:10.1088/1674-1056/acbaf3

中国物理B ›› 2023, Vol. 32 ›› Issue (10): 108502-108502.doi: 10.1088/1674-1056/acbaf3

Ambipolar performance improvement of the C-shaped pocket TFET with dual metal gate and gate-drain underlap

Zi-Miao Zhao(赵梓淼)¹, Zi-Xin Chen(陈子馨)¹, Wei-Jing Liu(刘伟景)^1,†, Nai-Yun Tang(汤乃云)¹, Jiang-Nan Liu(刘江南)¹, Xian-Ting Liu(刘先婷)¹, Xuan-Lin Li(李宣霖)¹, Xin-Fu Pan(潘信甫)¹, Min Tang(唐敏)², Qing-Hua Li(李清华)³, Wei Bai(白伟)⁴, and Xiao-Dong Tang(唐晓东)⁴

1 College of Electronics and Information Engineering, Shanghai University of Electric Power, Shanghai 200090, China;
2 Semiconductor Manufacturing International Corporation, Shanghai 201203, China;
3 Radiwave Technologies Corporation Limited, Shenzhen 518172, China;
4 Key Laboratory of Polar Materials and Devices, East China Normal University, Shanghai 200041, China

收稿日期:2022-10-31 修回日期:2023-02-09 接受日期:2023-02-10 出版日期:2023-09-21 发布日期:2023-10-09
通讯作者: Wei-Jing Liu E-mail:liuwj5500@163.com
基金资助:
Project supported by the National Natural Science Foundation of China (Grant Nos. 52177185 and 62174055).

Ambipolar performance improvement of the C-shaped pocket TFET with dual metal gate and gate-drain underlap

1 College of Electronics and Information Engineering, Shanghai University of Electric Power, Shanghai 200090, China;
2 Semiconductor Manufacturing International Corporation, Shanghai 201203, China;
3 Radiwave Technologies Corporation Limited, Shenzhen 518172, China;
4 Key Laboratory of Polar Materials and Devices, East China Normal University, Shanghai 200041, China

Received:2022-10-31 Revised:2023-02-09 Accepted:2023-02-10 Online:2023-09-21 Published:2023-10-09
Contact: Wei-Jing Liu E-mail:liuwj5500@163.com
Supported by:
Project supported by the National Natural Science Foundation of China (Grant Nos. 52177185 and 62174055).

摘要/Abstract

摘要： Dual-metal gate and gate-drain underlap designs are introduced to reduce the ambipolar current of the device based on the C-shaped pocket TFET(CSP-TFET). The effects of gate work function and gate-drain underlap length on the DC characteristics and analog/RF performance of CSP-TFET devices, such as the on-state current ($I_{\rm on}$), ambipolar current ($I_{\rm amb}$), transconductance ($g_{\rm m}$), cut-off frequency ($f_{\rm T}$) and gain-bandwidth product (GBP), are analyzed and compared in this work. Also, a combination of both the dual-metal gate and gate-drain underlap designs has been proposed for the C-shaped pocket dual metal underlap TFET (CSP-DMUN-TFET), which contains a C-shaped pocket area that significantly increases the on-state current of the device; this combination design substantially reduces the ambipolar current. The results show that the CSP-DMUN-TFET demonstrates an excellent performance, including high $I_{\rm on}$ ($9.03\times 10^{-4}$ A/μm), high $I_{\rm on}/I_{\rm off}$ ($\sim 10^{11}$), low SS$_{\rm avg}$ ($\sim 13 $ mV/dec), and low $I_{\rm amb}$ ($2.15\times 10^{-17}$ A/μm). The CSP-DMUN-TFET has the capability to fully suppress ambipolar currents while maintaining high on-state currents, making it a potential replacement in the next generation of semiconductor devices.

关键词: tunnel field effect transistor, ambipolar current, dual metal gate, gate-drain underlap

Abstract: Dual-metal gate and gate-drain underlap designs are introduced to reduce the ambipolar current of the device based on the C-shaped pocket TFET(CSP-TFET). The effects of gate work function and gate-drain underlap length on the DC characteristics and analog/RF performance of CSP-TFET devices, such as the on-state current ($I_{\rm on}$), ambipolar current ($I_{\rm amb}$), transconductance ($g_{\rm m}$), cut-off frequency ($f_{\rm T}$) and gain-bandwidth product (GBP), are analyzed and compared in this work. Also, a combination of both the dual-metal gate and gate-drain underlap designs has been proposed for the C-shaped pocket dual metal underlap TFET (CSP-DMUN-TFET), which contains a C-shaped pocket area that significantly increases the on-state current of the device; this combination design substantially reduces the ambipolar current. The results show that the CSP-DMUN-TFET demonstrates an excellent performance, including high $I_{\rm on}$ ($9.03\times 10^{-4}$ A/μm), high $I_{\rm on}/I_{\rm off}$ ($\sim 10^{11}$), low SS$_{\rm avg}$ ($\sim 13 $ mV/dec), and low $I_{\rm amb}$ ($2.15\times 10^{-17}$ A/μm). The CSP-DMUN-TFET has the capability to fully suppress ambipolar currents while maintaining high on-state currents, making it a potential replacement in the next generation of semiconductor devices.

Key words: tunnel field effect transistor, ambipolar current, dual metal gate, gate-drain underlap

中图分类号: (Junction breakdown and tunneling devices (including resonance tunneling devices))

85.30.Mn

85.30.Tv (Field effect devices) 81.05.Cy (Elemental semiconductors)

Zi-Miao Zhao(赵梓淼), Zi-Xin Chen(陈子馨), Wei-Jing Liu(刘伟景), Nai-Yun Tang(汤乃云), Jiang-Nan Liu(刘江南), Xian-Ting Liu(刘先婷), Xuan-Lin Li(李宣霖), Xin-Fu Pan(潘信甫), Min Tang(唐敏), Qing-Hua Li(李清华), Wei Bai(白伟), and Xiao-Dong Tang(唐晓东). Ambipolar performance improvement of the C-shaped pocket TFET with dual metal gate and gate-drain underlap[J]. 中国物理B, 2023, 32(10): 108502-108502.

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Ambipolar performance improvement of the C-shaped pocket TFET with dual metal gate and gate-drain underlap

Ambipolar performance improvement of the C-shaped pocket TFET with dual metal gate and gate-drain underlap

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