中国物理B ›› 2019, Vol. 28 ›› Issue (6): 68502-068502.doi: 10.1088/1674-1056/28/6/068502

• INTERDISCIPLINARY PHYSICS AND RELATED AREAS OF SCIENCE AND TECHNOLOGY • 上一篇    下一篇

Dark count rate and band to band tunneling optimization for single photon avalanche diode topologies

Taha Haddadifam, Mohammad Azim Karami   

  1. Iran University of Science and Technology
  • 收稿日期:2019-01-11 修回日期:2019-04-08 出版日期:2019-06-05 发布日期:2019-06-05
  • 通讯作者: Mohammad Azim Karami E-mail:karami@iust.ac.ir

Dark count rate and band to band tunneling optimization for single photon avalanche diode topologies

Taha Haddadifam, Mohammad Azim Karami   

  1. Iran University of Science and Technology
  • Received:2019-01-11 Revised:2019-04-08 Online:2019-06-05 Published:2019-06-05
  • Contact: Mohammad Azim Karami E-mail:karami@iust.ac.ir

摘要:

This paper proposes two optimal designs of single photon avalanche diodes (SPADs) minimizing dark count rate (DCR). The first structure is introduced as p+/pwell/nwell, in which a specific shallow pwell layer is added between p+ and nwell layers to decrease the electric field below a certain threshold. The simulation results show on average 19.7% and 8.5% reduction of p+/nwell structure's DCR comparing with similar previous structures in different operational excess bias and temperatures respectively. Moreover, a new structure is introduced as n+/nwell/pwell, in which a specific shallow nwell layer is added between n+ and pwell layers to lower the electric field below a certain threshold. The simulation results show on average 29.2% and 5.5% decrement of p+/nwell structure's DCR comparing with similar previous structures in different operational excess bias and temperatures respectively. It is shown that in higher excess biases (about 6 volts), the n+/nwell/pwell structure is proper to be integrated as digital silicon photomultiplier (dSiPM) due to low DCR. On the other hand, the p+/pwell/nwell structure is appropriate to be utilized in dSiPM in high temperatures (above 50 ℃) due to lower DCR value.

关键词: single-photon avalanche diode, digital silicon photomultiplier, dark count rate

Abstract:

This paper proposes two optimal designs of single photon avalanche diodes (SPADs) minimizing dark count rate (DCR). The first structure is introduced as p+/pwell/nwell, in which a specific shallow pwell layer is added between p+ and nwell layers to decrease the electric field below a certain threshold. The simulation results show on average 19.7% and 8.5% reduction of p+/nwell structure's DCR comparing with similar previous structures in different operational excess bias and temperatures respectively. Moreover, a new structure is introduced as n+/nwell/pwell, in which a specific shallow nwell layer is added between n+ and pwell layers to lower the electric field below a certain threshold. The simulation results show on average 29.2% and 5.5% decrement of p+/nwell structure's DCR comparing with similar previous structures in different operational excess bias and temperatures respectively. It is shown that in higher excess biases (about 6 volts), the n+/nwell/pwell structure is proper to be integrated as digital silicon photomultiplier (dSiPM) due to low DCR. On the other hand, the p+/pwell/nwell structure is appropriate to be utilized in dSiPM in high temperatures (above 50 ℃) due to lower DCR value.

Key words: single-photon avalanche diode, digital silicon photomultiplier, dark count rate

中图分类号:  (Semiconductor-device characterization, design, and modeling)

  • 85.30.De
85.60.Dw (Photodiodes; phototransistors; photoresistors) 85.60.Gz (Photodetectors (including infrared and CCD detectors)) 42.79.Pw (Imaging detectors and sensors)