Temperature- and voltage-dependent trap generation model in high-k metal gate MOS device with percolation simulation

doi:10.1088/1674-1056/25/8/087306

中国物理B ›› 2016, Vol. 25 ›› Issue (8): 87306-087306.doi: 10.1088/1674-1056/25/8/087306

• CONDENSED MATTER: ELECTRONIC STRUCTURE, ELECTRICAL, MAGNETIC, AND OPTICAL PROPERTIES • 上一篇下一篇

Temperature- and voltage-dependent trap generation model in high-k metal gate MOS device with percolation simulation

Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of MicroElectronics, Chinese Academy of Sciences, Beijing 100029, China

收稿日期:2016-03-07 修回日期:2016-03-30 出版日期:2016-08-05 发布日期:2016-08-05
通讯作者: Wen-Wu Wang E-mail:wangwenwu@ime.ac.cn
基金资助:
Project supported by the National High Technology Research and Development Program of China (Grant No. SS2015AA010601), the National Natural Science Foundation of China (Grant Nos. 61176091 and 61306129), and the Opening Project of Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of MicroElectronics of Chinese Academy of Sciences.

Temperature- and voltage-dependent trap generation model in high-k metal gate MOS device with percolation simulation

Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of MicroElectronics, Chinese Academy of Sciences, Beijing 100029, China

Received:2016-03-07 Revised:2016-03-30 Online:2016-08-05 Published:2016-08-05
Contact: Wen-Wu Wang E-mail:wangwenwu@ime.ac.cn
Supported by:
Project supported by the National High Technology Research and Development Program of China (Grant No. SS2015AA010601), the National Natural Science Foundation of China (Grant Nos. 61176091 and 61306129), and the Opening Project of Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of MicroElectronics of Chinese Academy of Sciences.

摘要/Abstract

摘要： High-k metal gate stacks are being used to suppress the gate leakage due to tunneling for sub-45 nm technology nodes. The reliability of thin dielectric films becomes a limitation to device manufacturing, especially to the breakdown characteristic. In this work, a breakdown simulator based on a percolation model and the kinetic Monte Carlo method is set up, and the intrinsic relation between time to breakdown and trap generation rate R is studied by TDDB simulation. It is found that all degradation factors, such as trap generation rate time exponent m, Weibull slope β and percolation factor s, each could be expressed as a function of trap density time exponent α. Based on the percolation relation and power law lifetime projection, a temperature related trap generation model is proposed. The validity of this model is confirmed by comparing with experiment results. For other device and material conditions, the percolation relation provides a new way to study the relationship between trap generation and lifetime projection.

关键词: high-k metal gate, TDDB, percolation theory, kinetic Monte Carlo, trap generation model

Abstract: High-k metal gate stacks are being used to suppress the gate leakage due to tunneling for sub-45 nm technology nodes. The reliability of thin dielectric films becomes a limitation to device manufacturing, especially to the breakdown characteristic. In this work, a breakdown simulator based on a percolation model and the kinetic Monte Carlo method is set up, and the intrinsic relation between time to breakdown and trap generation rate R is studied by TDDB simulation. It is found that all degradation factors, such as trap generation rate time exponent m, Weibull slope β and percolation factor s, each could be expressed as a function of trap density time exponent α. Based on the percolation relation and power law lifetime projection, a temperature related trap generation model is proposed. The validity of this model is confirmed by comparing with experiment results. For other device and material conditions, the percolation relation provides a new way to study the relationship between trap generation and lifetime projection.

Key words: high-k metal gate, TDDB, percolation theory, kinetic Monte Carlo, trap generation model

中图分类号: (Metal-insulator-semiconductor structures (including semiconductor-to-insulator))

73.40.Qv

73.43.Cd (Theory and modeling) 77.22.Jp (Dielectric breakdown and space-charge effects)

徐昊, 杨红, 王艳蓉, 王文武, 罗维春, 祁路伟, 李俊峰, 赵超, 陈大鹏, 叶甜春. Temperature- and voltage-dependent trap generation model in high-k metal gate MOS device with percolation simulation[J]. 中国物理B, 2016, 25(8): 87306-087306.

Hao Xu(徐昊), Hong Yang(杨红), Yan-Rong Wang(王艳蓉), Wen-Wu Wang(王文武), Wei-Chun Luo(罗维春), Lu-Wei Qi(祁路伟), Jun-Feng Li(李俊峰), Chao Zhao(赵超), Da-Peng Chen(陈大鹏), Tian-Chun Ye(叶甜春). Temperature- and voltage-dependent trap generation model in high-k metal gate MOS device with percolation simulation[J]. Chin. Phys. B, 2016, 25(8): 87306-087306.

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Temperature- and voltage-dependent trap generation model in high-k metal gate MOS device with percolation simulation

Temperature- and voltage-dependent trap generation model in high-k metal gate MOS device with percolation simulation

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