中国物理B ›› 2010, Vol. 19 ›› Issue (1): 14601-014601.doi: 10.1088/1674-1056/19/1/014601
樊春1, 孙爱东1, 许洪华2, 刘晓彦2, 何毓辉2, 杜刚2, 韩汝琦2, 康晋锋2
Xu Hong-Hua(许洪华)a), Liu Xiao-Yan(刘晓彦)a)†, He Yu-Hui(何毓辉)a), Fan Chun(樊春)b), Du Gang(杜刚)a), Sun Ai-Dong(孙爱东)b), Han Ru-Qi(韩汝琦)a), and Kang Jin-Feng(康晋锋)a)
摘要: In this work, we investigate strain effects induced by the deposition of gate dielectrics on the valence band structures in Si (110) nanowire via the simulation of strain distribution and the calculation of a generalized 6 × 6k $\cdot$ p strained valence band. The nanowire is surrounded by the gate dielectric. Our simulation indicates that the strain of the amorphous SiO2 insulator is negligible without considering temperature factors. On the other hand, the thermal residual strain in a nanowire with amorphous SiO2 insulator which has negligible lattice misfit strain pushes the valence subbands upwards by chemical vapour deposition and downwards by thermal oxidation treatment. In contrast with the strain of the amorphous SiO2 insulator, the strain of the HfO2 gate insulator in Si (110) nanowire pushes the valence subbands upwards remarkably. The thermal residual strain by HfO2 insulator contributes to the up-shifting tendency. Our simulation results for valence band shifting and warping in Si nanowires can provide useful guidance for further nanowire device design.
中图分类号: (Electronic structure of nanoscale materials and related systems)