Analysis of the inhomogeneous barrier and phase composition of W/4H-SiC Schottky contacts formed at different annealing temperatures*

Project supported by the Opening Project of Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences and the National Key Research and Development Program of China (Grant No. 2016YFB0100601).

Dong Sheng-Xu1, 2, Bai Yun1, †, Tang Yi-Dan1, 2, Chen Hong1, 2, Tian Xiao-Li1, Yang Cheng-Yue1, Liu Xin-Yu1
High-Frequency High-Voltage Device and Integrated Circuits R & D Center, Institute of Microelectronics of the Chinese Academy of Sciences, Beijing 100029, China
University of Chinese Academy of Sciences, Beijing 100049, China

 

† Corresponding author. E-mail: baiyun@ime.ac.cn

Project supported by the Opening Project of Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences and the National Key Research and Development Program of China (Grant No. 2016YFB0100601).

Abstract

The electrical characteristics of W/4H-SiC Schottky contacts formed at different annealing temperatures have been measured by using current–voltage–temperatures (IVT) and capacitance–voltage–temperatures (CVT) techniques in the temperature range of 25 °C–175 °C. The testing temperature dependence of the barrier height (BH) and ideality factor (n) indicates the presence of inhomogeneous barrier. Tung’s model has been applied to evaluate the degree of inhomogeneity, and it is found that the 400 °C annealed sample has the lowest T0 of 44.6 K among all the Schottky contacts. The barrier height obtained from CVT measurement is independent of the testing temperature, which suggests a uniform BH. The x-ray diffraction (XRD) analysis shows that there are two kinds of space groups of W when it is deposited or annealed at lower temperature (≤ 500 °C). The phase of W2C appears in the sample annealed at 600 °C, which results in the low BH and the high T0. The 500 °C annealed sample has the highest BH at all testing temperatures, indicating an optimal annealing temperature for the W/4H-SiC Schottky rectifier for high-temperature application.

PACS: 73.40.Ns
1. Introduction

Silicon carbide (SiC) has received remarkable attention as the representative of the third generation of semiconductor material for fabrication of high-power, high-frequency, and high-temperature devices, due to its physical and electronic properties, such as high breakdown electric field strength, high saturation electron velocity, and high thermal conductivity.[1,2] SiC Schottky contact is the basic structure in SiC devices. The thermal annealing treatments after the deposition of metal into SiC are introduced to obtain highly reproducible SiC Schottky contacts[3] and terminate the dangling bonds of SiC at the interface of metal/SiC to reduce the surface states of the structure.[4] The reaction between the metal and SiC may occur at the interface during the annealing treatments, and the interface material, particularly the new phases formed in the interface, plays a key role in the electrical properties of the contact. The performance of SiC Schottky diode largely depends on the quality of the metal/SiC contact, and a reliable Schottky contact is necessary for high-power applications.[5]

Barrier height (BH) and ideality factor (n) are the fundamental parameters of Schottky barrier diodes (SBDs). The reliable Schottky contacts of rectifiers require BH to be typically above ∼ 0.6 eV as well as low density of interface defects.[6,7] The BH is likely to be a function of the interface atomic structure, and the atomic inhomogeneities at the metal-semiconductor (MS) interface which are caused by grain boundaries, multiple phases, facets, defects, a mixture of different phases, etc.[811] In addition, Song et al.[11] suggested that the barrier inhomogeneities could occur as a result of imperfect MS interface and lead to an abnormal variation of Schottky barrier height and ideality factor with varied testing temperature. Tung’s model[8] assumed that nanometer-size patches with lower barrier height were embedded in a uniform high barrier background. The background with high barrier would pinch off the low-BH patch and the height of the saddle point would determine the current through Schottky contacts.

For the Schottky contact metal for high-temperature application, Maset et al. reported[12] that the Ti and Ni metal layers typically used for commercial SiC Schottky diodes were not suitable for high-temperature operation, while tungsten showed superior chemical stability and reliability over a wide range of temperature, making it a perfect candidate for high-temperature and high-voltage applications.[1316] Ferhat et al. reported[17] that the 500 °C annealed W/4H-SiC Schottky contact exhibited barrier inhomogeneities. Some researchers have studied the reaction between W and SiC at high temperatures,[18,19] but the effects of annealing temperature on the properties of W/SiC Schottky contact, especially the degree of inhomogeneity of the BH, to the best of our knowledge, have not been investigated yet.

In the present work, we measure the electrical characterization of W/4H-SiC Schottky contacts formed at different annealing temperatures. The temperature dependence of ideality factor and BH indicates the formation of an inhomogeneous barrier, which can be conveniently interpreted by considering lateral non-homogeneous distributions of BH according to Tung’s model. The degree of inhomogeneity of the BH analyzed by the “T0 anomaly” of Tung’s model is correlated to the temperature of thermal annealing treatment. Furthermore, the solid state reaction of W with 4H-SiC, the phase composition at different annealing temperatures, and its linkage with the performance and degradation mechanism of the W/4H-SiC SBDs are also investigated.

2. Experiment

The 4H n-type epitaxial wafers used to fabricate Schottky contacts were supplied by EpiWorld International Co., Ltd. with a carrier concentration ND = 7.08 × 1015 cm−3 and a thickness of 11.18 μm, and were grown on a highly doped (∼ 1 × 1019 cm−3) substrate layer with a resistivity of 0.018 Ω · cm and a thickness of 350 μm. The SiC wafers were first treated with standard RCA cleaning steps, and sacrificial oxidation was used to improve the SiC interface condition. The oxide layer was etched by dilute HF solution, and the back side Ohmic contact was produced by deposition of a 200-nm-thick Ni film, followed by the rapid thermal annealing (RTA) at 950 °C for 120 s in nitrogen ambiance. Thereafter, a 200-nm-thick W layer was deposited by e-beam evaporation on the surface of SiC epitaxial layer. The Schottky contacts which had circular geometry with a diameter of 500 μm were formed by a standard photolithography process. Six kinds of samples were prepared: one without thermal treatment and the others were further treated by RTA at different temperatures (400 °C, 500 °C, 600 °C, 700 °C, and 1000 °C) for 5 min in vacuum. The contacts were characterized by current–voltage (IV) and capacitance–voltage (CV) with the measuring temperature range of 25 °C–175 °C by using an Agilent 1500B source meter unit. X-ray diffraction (XRD) analyses were carried out in order to identify the formed phases and their crystallographic orientations.

3. Results and discussion

Considering the effect of the series resistance Rs, the forward current–voltage characteristics of a Schottky contact obeying the thermionic emission (TE) model are given by (for (VIRs) > 3 kT/q)[20]

with the saturation current Is expressed by
where S is the area of the contact, A* is the effective Richardson constant (146 A·cm2 · K−2 for n-type 4H-SiC[21]), n is the ideality factor, ΦB is the BH, q is the electronic charge, k is the Boltzmann constant, and T is the absolute temperature.

The values of n, ΦB, and Rs are calculated using a method developed by Cheung and Cheung[22]

Taking the sample annealed at 500 °C as an example, as shown in Fig. 1(b), equation (3) gives a straight line for the data of the downward-curvature region of the IVT characteristics shown in Fig. 1(a). Therefore, the slope and y-intercept of a plot of dV/d(ln I) versus I will give Rs and nkT/q, respectively. Using the n value determined from Eq. (3) and the data of downward-curvature region in Eq. (4), a plot of H (I) versus I according to Eq. (5) also gives a straight line with y-intercept equal to n ΦB. Thus, the values of n, ΦB, and Rs of the contacts are obtained, respectively.

Fig. 1. (color online) (a) The IVT plots of W/4H-SiC Schottky contact. (b) The experimental dV/d(ln I) versus I and H(I) versus I plots for the W/4H-SiC Schottky contact at different testing temperatures.

The n, ΦB, and Rs at different testing temperatures obtained from Fig. 1(b) are shown in Fig. 2. It can be clearly seen that ΦB increases and n decreases as the testing temperature increases. The temperature dependence of n and ΦB has been reported in different literatures,[17,23,24] and it has been explained as the presence of an inhomogeneous Schottky barrier. The series resistance increases with increasing temperature, and similar results were reported by Toumi et al.,[25] which could be explained by the fact that the main component of series resistivity, epitaxial, and substrate layer increase with increasing temperature.[6] The resistance at room temperature is somewhat higher than that at high temperature, which is possibly due to the measuring equipment.

Fig. 2. (color online) (a) n and ΦB as a function of the testing temperature for the W/4H-SiC Schottky contacts. (b) Rs of the W/4H-SiC Schottky contacts at different testing temperatures.

Applying Tung’s model to our case, we present the plot of nkT versus kT in Fig. 3(a), where the straight line describes the ideal behavior (n = 1). As can be seen, the n’s obtained at different temperatures are fitted by a straight line parallel to that of the ideal case. Such behavior is typical of a real Schottky contact with a distribution of barrier inhomogeneity, and is commonly referred to as the so-called “T0 anomaly”, while the value of T0 can be determined by

Figure 3(a) shows that the experimental results of n(T) fit very well with the theoretical equation (6), and figure 3(b) shows the different T0 values extracted from Fig. 3(a).

Fig. 3. (color online) (a) Plot of nkT/q versus kT/q showing the T0 effect. (b) T0 anomaly versus annealing temperature.

According to Tung’s model, there are patches of low barrier (B0 − Δ) embedded in a uniform high-barrier height (B0), and the deviation is expressed as Δ. By assuming the circular patches with radius R0, the parameter can be used to describe the barrier inhomogeneity. Considering the pinch-off model, the patch parameter γ is not a constant, Tung and coworkers suggest the Gaussian distribution of γ with a standard deviation σ, and the constant T0 is given by

where Vbb is the band bending, and η = εs/qNd, while εs is the permittivity of the material. Assuming that the parameters Vbb and η are irrelevant to the annealing treatment, thus, the lower value of T0 indicates smaller distribution of γ. Figure 3(b) shows that the sample annealed at 400 °C has the lowest T0 of 44.6 K, which means that the 400 °C annealed contact has the lowest degree of inhomogeneity and there are fewer small regions with low barriers through the contact.

In order to identify the formed phases during the annealing process, XRD analyses are carried, and the CV characteristics at different testing temperatures are also evaluated. The x-ray diffraction spectra of different annealing temperatures are shown in Fig. 4. The capacitance is measured at different reverse bias values at 1 MHz by superimposing an ac voltage on the dc voltage. Taking the sample annealed at 500 °C as an example, the C−2V plots are shown in Fig. 5(a), and the capacitance is given by

where S is the area of the contact, Vbi is the built in potential, ν is the depth of Fermi level below conduction band, ND is the doping concentration of epitaxial layer, and εs is the permittivity of semiconductor. The x-intercept in the plot of C−2V gives the value of Vbi, and then the barrier height is determined using the following equation:
where NC is the effective density of state in the conduction band.

Fig. 4. (color online) X-ray diffraction spectra of W/4H-SiC Schottky contacts surface upon different annealing temperatures. The unlabeled peaks at the diffraction angle about 35° are considered to be SiC.
Fig. 5. (color online) (a) CV measured BH of W/4H-SiC Schottky contacts formed at different annealing temperatures versus different testing temperatures. (b) CV and IV measured BH at different testing temperatures of W/4H-SiC Schottky contacts versus different annealing temperatures.

The BH’s obtained by CV method are illustrated in Fig. 5(a), showing testing temperature independence, which means a uniform high barrier.[26] And the BH’s obtained from Fig. 2(a) (IV) are also shown in Fig. 5(b) as comparisons.

Figure 4 shows the XRD spectra of W/4H-SiC Schottky contacts formed at different temperatures. For the as-deposited, 400 °C, and 500 °C annealed samples, there are two kinds of space groups of W. The diffraction peaks at 39.96°, 43.78°, 66.60°, 69.56°, and 75.10° can be attributed to the (210), (211), (320), (321), (400), (420), and (421) reflection of W(Pm-3m), respectively, while the diffraction peaks at 40.30°, 58.50°, 73.30°, and 87.06° can be attributed to the (110), (200), (211), and (220) reflection of W(Im-3n), respectively. The intensity of the W(Pm-3m) peak decreases with the increasing annealing temperature, and only the peak of W(Im-3n) exists at the annealing temperature of 600 °C. At the annealing temperature of 600 °C, the appearance of the peaks at 35.60° and 75.06° can be attributed to the (002) and (240) reflections of the formed W2C phase during the annealing treatment, and the increase of the peak intensity and the emerging peaks of other crystallographic orientations of W2C phase at the annealing temperature of 1000 °C might be interpreted as further reaction between W and SiC. The Schottky barrier height of W2C/4H-SiC is about 0.94 eV,[27] apparently lower than that of W/4H-SiC, thus the sample annealed above 500 °C shows lower BH (obtained from IV) than that annealed at lower temperature as shown in Fig. 5(b).

The appearance of W2C at high annealing temperature may lead to more patches with lower barrier height than that at low annealing temperature, which is the reason of higher T0 for the samples annealed at 600 °C, 700 °C, and 1000 °C, as shown in Fig. 3(b). Thus for the fabrication of W/4H-SiC Schottky rectifier for high temperature application, an annealing temperature of 500 °C may result in the highest BH and lower reverse leakage current.[6]

The current of the Schottky contact is made up of two components.[8] One is the current over the entire contact, which has a uniform BH, and the other is an additional current due to the presence of the low-BH patches. At high temperatures, the current is dominated by thermionic emitted transport over the uniform BH and displays a near unity ideality factor. At low temperatures, the low-BH patches dominate at small bias and the ideality factor is larger than 1. As shown in Fig. 5(b), the relative value of BH at high testing temperature tends to accord with the relative value of BH obtained from CV measurement.

4. Conclusion

The n, ΦB, and Rs of several W/4H-SiC Schottky contacts annealed at different temperatures are obtained by IVT measurements, and the temperature dependence of the ideality factor and BH indicates the formation of an inhomogeneous barrier. The experimental data are analyzed by the Tung’s model to describe the contact with a homogeneous high-barrier background in which low-barrier patches are embedded. The values of T0 in Tung’s model are calculated to evaluate the degree of the barrier inhomogeneous. It is found that the degree of the inhomogeneous barrier depends on the thermal annealing temperature, and the 400 °C treated samples have the lowest degree of inhomogeneity of the barrier. The BH of the Schottky contact is related to both the space group of W and the phase composition of W–SiC reaction. The phase of W2C appears at annealing temperature of 600 °C, resulting in a low BH of the Schottky contact and a high T0, which means high degree of inhomogeneity of the barrier. The fact that the 500 °C annealed sample has the highest BH at all testing temperatures indicates an optimal annealing temperature for the W/4H-SiC Schottky rectifier for high temperature application. The BH’s obtained from CVT are higher than those of IVT and are independent of the testing temperature, and are considered as the value of uniform barrier height. At high temperature, the BH obtained by IVT measurements tends to be close to the BH obtained from CVT, which means the current is dominated by thermionic emitted transport over the uniform BH.

Reference
[1] Geib K M Wilson C Long R G Wilmsen C W 1990 J. Appl. Phys. 68 2796
[2] Trew R J 1997 Phys. Status Solidi 162 409
[3] Roccaforte F La Via F Raineri V 2003 Appl. Phys. 77 827
[4] Gupta S K Azam A Akhtar J 2011 Physica 406 3030
[5] Marinova T Kakanakova-Georgieva A Krastev V Kakanakov R Neshev M Kassamakova L Noblanc O Arnodo C Cassette S Brylinski C 1997 Mater. Sci. Eng. 46 223
[6] Sze S M Ng K K 2006 Physics of Semiconductor Devices New York Wiley 299
[7] Feng Z C 2013 SiC Power Materials: Devices and Applications Berlin Springer 63
[8] Tung R T 1992 Phys. Rev. 45 13509
[9] Mönch W 1999 J. Vac. Sci. Technol. 17 1867
[10] Schmitsdorf R Kampen T Mönch W 1997 J. Vac. Sci. Technol. 15 1221
[11] Song Y Van Meirhaeghe R Laflere W Cardon F 1986 Solid-State Electron. 29 633
[12] Maset E Sanchis-Kilders E Ejea J B Ferreres A Jordan J Esteve V Brosselard P Jorda X Vellvehi M Godignon P 2009 IEEE Trans. Device Mater. Reliab. 9 557
[13] Kinoshita A Ohyanagi T Yatsuo T Fukuda K Okumura H Arai K 2010 Mater. Sci. Forum 645 893
[14] Treu M Rupp R Kapels H Bartsch W 2001 Mater. Sci. Forum 353 679
[15] Weiss R Frey L Ryssel H 2001 Appl. Surf. Sci. 184 413
[16] Berthou M Godignon P Montserrat J Millan J Planson D 2011 J. Electron. Mater. 40 2355
[17] Hamida A F Ouennoughi Z Sellai A Weiss R Ryssel H 2008 Semicond. Sci. Technol. 23 045005
[18] Geib K M Wilson C Long R G Wilmsen C W 1990 J. Appl. Phys. 68 2796
[19] Rogowski J Kubiak A 2015 Mater. Sci. Eng. 191 57
[20] Rhoderick E H Williams R H 1998 Metal-Semiconductor Contacts 2 Oxford Clarendon Press
[21] Itoh A Kimoto T Matsunami H 1995 IEEE Electron. Dev. Lett. 16 280
[22] Cheung S Cheung N 1986 Appl. Phys. Lett. 49 85
[23] Calcagno L Ruggiero A Roccaforte F La Via F 2005 J. Appl. Phys. 98 023713
[24] Wang Y H Zhang Y M Zhang Y M Song Q W Jia R X 2011 Chin. Phys. 20 087305
[25] Toumi S Ferhat-Hamida A Boussouar L Sellai A Ouennoughi Z Ryssel H 2009 Microelectron. Eng. 86 303
[26] Ohdomari I Tu K 1980 J. Appl. Phys. 51 3735
[27] Knoll L Teodorescu V Minamisawa R 2016 IEEE Electron. Dev. Lett. 37 1318