Cite this Article
Xiang Lei, Zhang Xing, Zhang Jian-Wei, Ning Yong-Qiang, Hofmann Werner, Wang Li-Jun. Stable single-mode operation of 894.6 nm VCSEL at high temperatures for Cs atomic sensing. Chinese Physics B, 2017, 26(7): 074209  
Permissions
Stable single-mode operation of 894.6 nm VCSEL at high temperatures for Cs atomic sensing
Xiang Lei1, 2, Zhang Xing1, †, Zhang Jian-Wei1, Ning Yong-Qiang1, Hofmann Werner3, Wang Li-Jun1
Changchun Institute of Optics, Fine Mechanics and Physics, Chinese Academy of Sciences, Changchun 130033, China
University of Chinese Academy of Sciences, Beijing 100039, China
Technical University of Berlin, Berlin, Germany

 

† Corresponding author. E-mail: zhangx@ciomp.ac.cn

Abstract

In this paper, stable single-mode operation at high temperatures is produced by the surface-relief-integrated vertical cavity surface emitting laser (VCSEL). The gain-cavity mode detuning technique is employed to realize high operating temperatures for the VCSEL. The surface relief is etched in the centre of the top side as a mode discriminator for the fundamental mode output, and the threshold current minimum is 1.94 mA at high temperatures by the gain-cavity mode detuning technique. Maximum single-fundamental-mode output power of 0.45 mW at 80 °C is obtained, and the side mode suppression ratios (SMSRs) are more than 30 dB with increasing temperature and current, respectively.

PACS: 42.55.Px;42.60.Jf;42.62.Fi
Keyword:single-mode operation;surface relief;gain-cavity mode detuning;vertical cavity surface emitting laser (VCSEL)
1. Introduction

Vertical cavity surface emitting lasers (VCSELs) offer unique advantages over other laser structures, such as beam quality, wafer-level testing, small power consumption, and low threshold current.[1] Single mode VCSELs are of interest for applications in micro positioning navigation timing, chip-scale atomic clocks (CSACs), and the atomic gyroscope system.[2–4] For Cs atomic sensing, stable single mode operation of 894.6 nm VCSELs at high temperatures must be guaranteed, because the Cs atomic sensor must operate above 80 °C and the CPT effect of the Cesium D1 line must be motivated by 894.6 nm.[5] For conventional VCSELs, the oxide aperture diameter is limited to 3 μm to achieve single fundamental modes.[6–8] Unfortunately, limited oxide apertures will cause limited output powers and large resistances, consequently limiting their applications. With the increasing ambient temperature, the emission wavelength of the VCSELs will be red-shifted, which is detrimental for Cs atomic sensing. Therefore, several structures have been developed for single-mode high-power VCSELs, such as the proton-implanted structure.[9] the small oxide-confined structure,[10] the metal aperture,[11] the photonic crystal structure,[12,13] the triangular-hole structure,[14,15] and the surface relief structure.[16] In this paper, a novel surface relief VCSEL (SR-VCSEL) based on gain-cavity mode detuning technology is produced. In the novel SR-VCSEL, the gain-cavity mode detuning solves the emission wavelength shift problem, and the shallow-etched surface relief structure serves as a mode discriminator in order to suppress higher-order modes. This structure does not impair the electrical or thermal features of the VCSEL, which is significant for the applications of Cs atomic sensing.

2. Simulation and experiment
2.1. Device model and simulation

The transverse optical confinement factor that determines the modal gain is expressed as

where is the electric field amplitude of the LP mode, and a is the radius of the VCSEL mesa. The fundamental mode LP has the highest modal gain, but for higher-order modes (LP, LP) the modal gain decreases with elevated mode order, which provides mode selectivity to obtain the fundamental mode. According to the relationship between the transverse mode distribution and the diameter of the optical field of the 7 μm oxide-confined VCSEL, the junction of LP and LP, LP is a key parameter. The higher-order modes are mainly distributed in the annular region, and the fundamental mode is mainly distributed in the central region; the diameter of the surface relief is set to be 3 μm. In this work, we use the transfer matrix to calculate the mirror loss of the VCSEL structures. By calculating the reflectivity of the p-side of our VCSEL structure with different etching depths, the relationship of the mirror loss versus the etched depth can be obtained, as shown in Fig. 1. Due to the periodic nature of the phase variations, when a layer of about 0.5 (110 nm) or 1.5 (247 nm) pairs of P-DBRs has been removed, the mirror loss reaches a maximum. Thus, the etched regions have a maximum threshold gain and increase the losses of higher-order modes. By removing the higher-order top layer, the higher-order modes can be suppressed and the LP mode area preserved through shallow etching.

Fig. 1. (color online) Simulation result of mirror loss versus etched depth for the surface-etch 894.6 nm VCSEL.

Figure 2 illustrates the gain-cavity mode detuning technique in structural design. We can see that the temperature dependence of the cavity mode (the black line) and the gain peak wavelengths (the red line) are 0.06 and 0.3 nm/K, respectively. Therefore, with the negative gain-cavity detuning, the gain peak wavelength approaches the cavity mode in the initial heating stage, and then exceeds the cavity mode in the later heating process. As a result, the cavity mode gain (the blue line) increases at first and then decreases with the elevated temperatures. As the threshold current is inversely proportional to the cavity mode gain, the minimum threshold current would occur at the maximum of the cavity mode gain.

Fig. 2. (color online) The relationship between the cavity mode and gain peak wavelengths under different temperatures. The blue line indicates the cavity mode gain at different temperatures.
2.2. Device structure and fabrication

Figure 3 shows the cross-section structure of the surface relief VCSEL (Fig. 3(a)) and the conventional VCSEL (Fig. 3(b)). The epitaxial semiconductor structure of the 894.6 nm VCSEL is grown on GaAs substrate by metal-organic chemical vapour deposition (MOCVD). The active region contains three InGaAs strained quantum wells to provide optical gain, the bottom distributed Bragg reflector (N-DBR) and the top DBR consist of 34 and 22.5 pairs of high-index AlGaAs and low-index AlGaAs layers, respectively. In addition, a 30-nm-thick AlGaAs layer is inserted between the active region and the p-DBR.

Fig. 3. (color online) Schematic cross section of surface relief VCSEL structure (a) and the conventional VCSEL structure (b).

Using SiO as the etching mask, the top DBR is patterned as a circular post by inductively coupled plasma reaction ion etching (ICP-RIE). To achieve the current and light confinement, a 7-μm-diameter oxide aperture is formed by selective oxidization of the AlGaAs layer. The positive electrode (Ti/Pt/Au) contact is formed on the top side after oxidation to realize ohmic contact. After that, the diameter of the surface relief is 3 μm, which is introduced into the central region on the top by one additional lithography step. Then, 1.5 pairs, (247 nm) of DBRs are etched by wet chemical etching (CHOH:HPO:HO:HO = 6:1:1:30) and the diameter of the etched surface relief ring is 10 μm. Finally, the n-contact (Au/Ge/Ni) is formed at the bottom of the substrate, and annealed by rapid thermal annealing at 400 °C.

3. Results and discussion

Figure 4 shows the mode characteristics of SR and conventional VCSEL, which are measured under the continuous-wave (CW) condition at room temperature. The optical spectra of the conventional VCSEL (Fig. 4(a)) shows numerous peaks at different driving currents, which means more modes appear and no significant fundamental mode is obtained. However, the optical spectra of the SR-VCSEL (Fig. 4(b)) always stay at a single peak state: the fundamental mode is still dominating and no more modes appear with increasing currents. The side mode suppression ratio (SMSR) reaches 35 dB throughout the whole current operating range. With increasing driving current above the threshold, current leakage and carrier effects, as well as increased non-radiative recombination, would lead to wavelength red-shift. The comparison of Fig. 4(a) and Fig. 4(b) proves that shallow surface relief provides mode selectivity to obtain the fundamental mode, and higher-order modes can be effectively suppressed.

Fig. 4. (color online) (a) The spectra of the conventional VCSEL at different driving currents; (b) the surface relief VCSEL at different driving currents.

The temperature dependences of the spectrum characteristics are shown in Fig. 5. As predicted from simulations, the fundamental mode has most of its field intensity in the unetched areas, and higher-order modes experience higher cavity loss in the etched areas, thereby being suppressed. In this work, single-mode operations with side mode suppression ratios (SMSR) greater than 30 dB at different temperatures are realized. The temperature dependences of the spectrum characteristics further prove that SR-VCSELs can help to achieve stable single modes.

Fig. 5. (color online) The spectra of SR-VCSEL at different temperatures of 22 °C, 50 °C, 70 °C, and 80 °C. The operating current is 4 mA.

Figure 6 shows the power-current characteristics of the SR-VCSEL under different temperatures. The device exhibits a maximum output power of 0.45 mW at 80 °C, and the maximum output power gradually declines as the ambient temperature rises from 22 °C to 90 °C; meanwhile, thermal roll-over occurs earlier with the elevated driving current. It can be seen that the linear increase of the power-current curve has some slight deviation. The main reason is that the SR-VCSEL needs higher carrier densities to maintain the threshold gain, so the carrier and current leakage effects lead to this deviation; increasing non-radiative recombination would be responsible for the deviation with higher carrier densities.[17]

Fig. 6. (color online) The light-current characteristics of SR-VCSEL under the continuous wave condition at different temperatures.

The SR-VCSEL shows excellent wavelength performance and low threshold current owing to the gain-cavity mode detuning technique in the structural design. As shown in Fig. 7, the red line illustrates the red-shift of the emission wavelength, and the blue line represents the threshold current that varies with changing temperature. In order to reduce the threshold current, the cavity mode should receive the maximum optical gain, as simulations predicted. The threshold current exhibits a distinct minimum value of 1.94 mA when the substrate temperature is 50 °C. The threshold current of the VCSELs usually varies with temperature and can be expressed by[18]

where , the threshold current will increase rapidly, no matter whether above or below . As a result, the temperature-dependent detuning effect has to be taken into account in the design. As the ambient temperature increases, the peak wavelength appears red-shifted mainly because of the changing average refractive index and the thermal expansion of the semiconductor layers, which would affect the thermal wavelength shift. On the other hand, the energy bandgap of semiconductor materials varies with the change in temperature; the bandgap shrinkage of quantum wells is also responsible for the red-shift.[19]

Fig. 7. (color online) (Blue) Threshold current and (red) central wavelength under the operating current of 4 mA versus different temperatures.
4. Conclusion

In summary, a surface relief structure is used to control single-mode characteristics effectively, and the low threshold current of SR-VCSEL at high temperatures is demonstrated for Cs atomic sensing applications. Numerical analysis and experimental results demonstrate that the shallow surface relief provides mode selectivity to obtain the fundamental mode and suppresses higher-order modes. Measurements reveal that at the CW condition, the single-mode output power is 0.45 mW with an SMSR greater than 30 dB at high temperatures. The threshold current minimum is 1.94 mA at 50 °C, which is beneficial for low power consumption. With further optimized structural parameters, higher performance SR-VCSELs are expected.

Reference
[1] Zhao Z B Xu C Xie Y Y Zhou K Liu F Shen G D 2012 Chin. Phys. 21 232
[2] Alsamaneh A Michalzik R 2010 Proc. SPIE 7720
[3] Gruet F Al-Samaneh A Kroemer E Bimboes L Miletic D Affolderbach C Wahl D Boudot R Mileti G Michalzik R 2013 Opt. Express 21 5781
[4] Zhang X Zhang Y Zhang J W Zhang J Zhong C Y Huang Y W Ning Y Q Gu S H Wang L J 2016 Acta. Phys. Sin. 65 134204 in Chinese
[5] Zhang J Zhang X Zhu H Zhang J Ning Y Qin L Wang L 2015 Opt. Express 23 14763
[6] Ueki N Sakamoto A Nakamura T Nakayama H Sakurai J Otoma H Miyamoto Y Yoshikawa M Fuse M 1999 IEEE Photon. Technol. Lett. 11 1539
[7] Jung C Jager R Grabherr M Schnitzer P Michalzik R Weigl B Muller S Ebeling K J 1997 Electron. Lett. 33 1790
[8] Martinsson H Vukusic J A Ghisoni M Grabherr M Michalzik R Jager R Ebeling K J Larsson A 1999 Photon. Technol. Lett. 11 1536
[9] Young E W Choquette K D Chuang S L Geib K M 2001 IEEE Photon. Technol. Lett. 13 927
[10] Riechert H Ramakrishnan A Steinle G 2002 Semicond. Sci. Tech. 17 892
[11] Morgan R A Guth G D Focht M W Asom M T Kojima K Rogers L E Callis S E 1993 IEEE Photon. Technol. Lett. 5 374
[12] Danner A J Kim T S Choquette K D 2005 Electron. Lett. 41 325
[13] Xie Y Y Kan Q Xu C Zhu Y X Wang C X Chen H D 2012 IEEE Photon. Technol. Lett. 24 464
[14] Furukawa A Sasaki S Hoshi M Matsuzono A Moritoh K Baba T 2004 Appl. Phys. Lett. 85 5161
[15] Furukawa A Hoshi M Sasaki S Matsuzono A Moritoh K Baba T 2005 Proc. SPIE 183 5722
[16] Wei S M Xu C Deng J Zhu Y X Mao M M Xie Y Y Xu K Cao T Liu J C 2012 Chin. Phys. Lett. 29 084208
[17] Michalzik R 2013 VCSELs Fundamentals Berlin Springer 44 10.1007/978-3-642-24986-0
[18] Weigl B Grabherr M Jung C Jager R 1997 IEEE J. Sel. Top Quant. 3 409
[19] Derebezov I A Haisler V A Bakarov A K Kalagin A K Toropov A I Kachanova M M Gavrilova T A Semenova O I Tretyakov D B Beterov I I 2010 Semiconductors 44 1422