Ultra-low specific on-resistance high-voltage vertical double diffusion metal-oxide-semiconductor field-effect transistor with continuous electron accumulation layer

doi:10.1088/1674-1056/25/4/048502

中国物理B ›› 2016, Vol. 25 ›› Issue (4): 48502-048502.doi: 10.1088/1674-1056/25/4/048502

• INTERDISCIPLINARY PHYSICS AND RELATED AREAS OF SCIENCE AND TECHNOLOGY • 上一篇下一篇

Ultra-low specific on-resistance high-voltage vertical double diffusion metal-oxide-semiconductor field-effect transistor with continuous electron accumulation layer

Da Ma(马达), Xiao-Rong Luo(罗小蓉), Jie Wei(魏杰), Qiao Tan(谭桥), Kun Zhou(周坤), Jun-Feng Wu(吴俊峰)

1 State Key Laboratory of Electronic Thin Films and Integrated Devices. University of Electronic Science and Technology of China, Chengdu 610054, China;
2 Science and Technology on Analog Integrated Circuit Laboratory, Chongqing 400060, China

收稿日期:2015-10-12 修回日期:2015-12-15 出版日期:2016-04-05 发布日期:2016-04-05
通讯作者: Xiao-Rong Luo E-mail:xrluo@uestc.edu.cn
基金资助:
Project supported by the National Natural Science Foundation of China (Grant Nos. 61176069 and 61376079) and the Fundamental Research Funds for the Central Universities, China (Grant No. ZYGX2014Z006).

Ultra-low specific on-resistance high-voltage vertical double diffusion metal-oxide-semiconductor field-effect transistor with continuous electron accumulation layer

Da Ma(马达)¹, Xiao-Rong Luo(罗小蓉)^1,2, Jie Wei(魏杰)¹, Qiao Tan(谭桥)¹, Kun Zhou(周坤)¹, Jun-Feng Wu(吴俊峰)¹

1 State Key Laboratory of Electronic Thin Films and Integrated Devices. University of Electronic Science and Technology of China, Chengdu 610054, China;
2 Science and Technology on Analog Integrated Circuit Laboratory, Chongqing 400060, China

Received:2015-10-12 Revised:2015-12-15 Online:2016-04-05 Published:2016-04-05
Contact: Xiao-Rong Luo E-mail:xrluo@uestc.edu.cn
Supported by:
Project supported by the National Natural Science Foundation of China (Grant Nos. 61176069 and 61376079) and the Fundamental Research Funds for the Central Universities, China (Grant No. ZYGX2014Z006).

摘要/Abstract

摘要： A new ultra-low specific on-resistance (R_on,sp) vertical double diffusion metal-oxide-semiconductor field-effect transistor (VDMOS) with continuous electron accumulation (CEA) layer, denoted as CEA-VDMOS, is proposed and its new current transport mechanism is investigated. It features a trench gate directly extended to the drain, which includes two PN junctions. In on-state, the electron accumulation layers are formed along the sides of the extended gate and introduce two continuous low-resistance current paths from the source to the drain in a cell pitch. This mechanism not only dramatically reduces the R_on,sp but also makes the R_on,sp almost independent of the n-pillar doping concentration (N_n). In off-state, the depletion between the n-pillar and p-pillar within the extended trench gate increases the N_n, and further reduces the R_on,sp. Especially, the two PN junctions within the trench gate support a high gate-drain voltage in the off-state and on-state, respectively. However, the extended gate increases the gate capacitance and thus weakens the dynamic performance to some extent. Therefore, the CEA-VDMOS is more suitable for low and medium frequencies application. Simulation indicates that the CEA-VDMOS reduces the R_on,sp by 80% compared with the conventional super-junction VDMOS (CSJ-VDMOS) at the same high breakdown voltage (BV).

关键词: electron accumulation layer, PN junctions, low specific on-resistance, high breakdown voltage

Abstract: A new ultra-low specific on-resistance (R_on,sp) vertical double diffusion metal-oxide-semiconductor field-effect transistor (VDMOS) with continuous electron accumulation (CEA) layer, denoted as CEA-VDMOS, is proposed and its new current transport mechanism is investigated. It features a trench gate directly extended to the drain, which includes two PN junctions. In on-state, the electron accumulation layers are formed along the sides of the extended gate and introduce two continuous low-resistance current paths from the source to the drain in a cell pitch. This mechanism not only dramatically reduces the R_on,sp but also makes the R_on,sp almost independent of the n-pillar doping concentration (N_n). In off-state, the depletion between the n-pillar and p-pillar within the extended trench gate increases the N_n, and further reduces the R_on,sp. Especially, the two PN junctions within the trench gate support a high gate-drain voltage in the off-state and on-state, respectively. However, the extended gate increases the gate capacitance and thus weakens the dynamic performance to some extent. Therefore, the CEA-VDMOS is more suitable for low and medium frequencies application. Simulation indicates that the CEA-VDMOS reduces the R_on,sp by 80% compared with the conventional super-junction VDMOS (CSJ-VDMOS) at the same high breakdown voltage (BV).

Key words: electron accumulation layer, PN junctions, low specific on-resistance, high breakdown voltage

中图分类号: (Semiconductor-device characterization, design, and modeling)

85.30.De

85.30.Tv (Field effect devices) 85.30.Mn (Junction breakdown and tunneling devices (including resonance tunneling devices))

马达, 罗小蓉, 魏杰, 谭桥, 周坤, 吴俊峰. Ultra-low specific on-resistance high-voltage vertical double diffusion metal-oxide-semiconductor field-effect transistor with continuous electron accumulation layer[J]. 中国物理B, 2016, 25(4): 48502-048502.

Da Ma(马达), Xiao-Rong Luo(罗小蓉), Jie Wei(魏杰), Qiao Tan(谭桥), Kun Zhou(周坤), Jun-Feng Wu(吴俊峰). Ultra-low specific on-resistance high-voltage vertical double diffusion metal-oxide-semiconductor field-effect transistor with continuous electron accumulation layer[J]. Chin. Phys. B, 2016, 25(4): 48502-048502.

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Ultra-low specific on-resistance high-voltage vertical double diffusion metal-oxide-semiconductor field-effect transistor with continuous electron accumulation layer

Ultra-low specific on-resistance high-voltage vertical double diffusion metal-oxide-semiconductor field-effect transistor with continuous electron accumulation layer

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