中国物理B ›› 2019, Vol. 28 ›› Issue (8): 86801-086801.doi: 10.1088/1674-1056/28/8/086801

• CONDENSED MATTER: STRUCTURAL, MECHANICAL, AND THERMAL PROPERTIES • 上一篇    下一篇

Organic field-effect transistor floating-gate memory using polysilicon as charge trapping layer

Wen-Ting Zhang(张文婷), Fen-Xia Wang(王粉霞), Yu-Miao Li(李玉苗), Xiao-Xing Guo(郭小星), Jian-Hong Yang(杨建红)   

  1. 1 Institute of Microelectronics, Lanzhou University, Lanzhou 730000, China;
    2 School of Electronic and Information Engineering, Lanzhou Jiaotong University, Lanzhou 730070, China
  • 收稿日期:2019-04-10 修回日期:2019-05-27 出版日期:2019-08-05 发布日期:2019-08-05
  • 通讯作者: Jian-Hong Yang E-mail:yangjh@lzu.edu.cn

Organic field-effect transistor floating-gate memory using polysilicon as charge trapping layer

Wen-Ting Zhang(张文婷)1,2, Fen-Xia Wang(王粉霞)1, Yu-Miao Li(李玉苗)1, Xiao-Xing Guo(郭小星)1, Jian-Hong Yang(杨建红)1   

  1. 1 Institute of Microelectronics, Lanzhou University, Lanzhou 730000, China;
    2 School of Electronic and Information Engineering, Lanzhou Jiaotong University, Lanzhou 730070, China
  • Received:2019-04-10 Revised:2019-05-27 Online:2019-08-05 Published:2019-08-05
  • Contact: Jian-Hong Yang E-mail:yangjh@lzu.edu.cn

摘要: In this study, we present an organic field-effect transistor floating-gate memory using polysilicon (poly-Si) as a charge trapping layer. The memory device is fabricated on a N+-Si/SiO2 substrate. Poly-Si, polymethylmethacrylate, and pentacene are used as a floating-gate layer, tunneling layer, and active layer, respectively. The device shows bidirectional storage characteristics under the action of programming/erasing (P/E) operation due to the supplied electrons and holes in the channel and the bidirectional charge trapping characteristic of the poly-Si floating-gate. The carrier mobility and switching current ratio (Ion/Ioff ratio) of the device with a tunneling layer thickness of 85 nm are 0.01 cm2·V-1·s-1 and 102, respectively. A large memory window of 9.28 V can be obtained under a P/E voltage of ±60 V.

关键词: organic floating-gate memory, polysilicon floating-gate, memory window

Abstract: In this study, we present an organic field-effect transistor floating-gate memory using polysilicon (poly-Si) as a charge trapping layer. The memory device is fabricated on a N+-Si/SiO2 substrate. Poly-Si, polymethylmethacrylate, and pentacene are used as a floating-gate layer, tunneling layer, and active layer, respectively. The device shows bidirectional storage characteristics under the action of programming/erasing (P/E) operation due to the supplied electrons and holes in the channel and the bidirectional charge trapping characteristic of the poly-Si floating-gate. The carrier mobility and switching current ratio (Ion/Ioff ratio) of the device with a tunneling layer thickness of 85 nm are 0.01 cm2·V-1·s-1 and 102, respectively. A large memory window of 9.28 V can be obtained under a P/E voltage of ±60 V.

Key words: organic floating-gate memory, polysilicon floating-gate, memory window

中图分类号:  (Polymers, organics)

  • 68.35.bm
72.20.Jv (Charge carriers: generation, recombination, lifetime, and trapping) 73.40.Gk (Tunneling) 73.90.+f (Other topics in electronic structure and electrical properties of surfaces, interfaces, thin films, and low-dimensional structures)