A 2-kV high-voltage GaN HEMT on sapphire substrate with floating field plate technique and bonding pad over active region

A 2-kV high-voltage D-mode GaN high electron mobility transistor (HEMT) with floating field plate (FFP) technique and bonding pad over active region is demonstrated in this work. Compared with the conventional GaN HEMTs that utilize gate field plate (GFP) and source field plate (SFP) technologies, the breakdown voltage (BV) of the proposed device is enhanced by integrating GFP, SFP, and FFP together. This combination significantly reduces the electric field in the oxide layer, thereby reducing the breakdown risk of long-term operation. In order to save the chip area, the source and drain bonding pads of the conventional device and the proposed device are prepared on the upper surface of the active region. Meanwhile, the static on resistance (R_\rm DS,on) of the two devices are both \sim 150 m\Omega . At the same gate-drain spacing (L_\rm GD) of 30.5 μm, the conventional device features a specific on-resistance (R_\rm on,sp) of 10 m\Omega \cdot cm^2 and a BV close to 1600 V. While the R_\rm on,sp of the proposed device based on FFP technology is 10.5 m\Omega \cdotcm^2, and the BV is over 2000 V. Under the premise that the R_\rm on,sp is roughly the same, the BV of the proposed device is 33% higher than the conventional one. The proposed FFP GaN HEMT greatly reduces the oxide electric field, obtains excellent breakdown voltage characteristics, and has great potential for application in the field of high-voltage GaN HEMTs.