An integrated split and dummy gates MOSFET with fast turn-off and reverse recovery characteristics

A power MOSFET with integrated split gate and dummy gate (SD-MOS) is proposed and demonstrated by the TCAD SENTAURUS. The split gate is surrounded by the source and shielded by the dummy gate. Consequently, the coupling area between the split gate and the drain electrode is reduced, thus the gate-to-drain charge (Q_GD), reverse transfer capacitance (C_RSS) and turn-off loss (E_off) are significantly decreased. Moreover, the MOS-channel diode is controlled by the dummy gate with ultra-thin gate oxidet_ox, which can be turned on before the parasitic P-base/N-drift diode at the reverse conduction, then the majority carriers are injected to the N-drift to attenuate the minority injection. Therefore, the reverse recovery charge (Q_RR), time (T_RR) and peak current (I_RRM) are effectively reduced at the reverse freewheeling state. Additionally, the specific on-resistance (R_on,sp) and breakdown voltage (BV) are also studied to evaluate the static properties of the proposed SD-MOS. The simulation results show that the Q_GD of 6 nC/cm², the C_RSS of 1.1 pF/cm² at the V_DS of 150 V, the Q_RR of 1.2 μC/cm² and the R_on,sp of 8.4 mΩ⋅cm² are obtained, thus the figures of merit (FOM) including Q_GD × R_on,sp of 50 nC⋅mΩ, E_off × R_on,sp of 0.59 mJ⋅mΩ and the Q_RR × R_on,sp of 10.1 μC⋅mΩ are achieved for the proposed SD-MOS.