High performance infrared detectors compatible with CMOS-circuit process

A type of Si-based blocked impurity band photoelectric detector with a planar architecture is designed and demonstrated by a modified silicon semiconductor processing technique. In this route, multiple ion implantation is utilized to ensure the uniform distribution of the P elements in silicon, and rapid thermal annealing treatment is used to activate the P atoms and reduce damages caused by ion-implantation. The fabricated prototype device exhibits an excellent photoelectric response performance. With a direct current (DC) bias voltage of -2.3 V, the device detectivity to blackbody irradiation is as high as 5×10¹³cm·Hz^1/2/W, which corresponds to a device responsivity of nearly 4.6 A/W, showing their potential applications in infrared detection, infrared astrophysics, and extraterrestrial life science. In particular, the developed device preparation process is compatible with that for the CMOS-circuit, which greatly reduces the manufacturing cost.