Dual-gate lateral double-diffused metal–oxide semiconductor with ultra-low specific on-resistance

A new high voltage trench lateral double-diffused metal-oxide semiconductor (LDMOS) with ultra-low specific on-resistance (R_on,sp) is proposed. The structure features dual gate (DG LDMOS): a planar gate and a trench gate inset in the oxide trench. Firstly, the dual gate can provide dual conduction channel and reduce R_on,sp dramatically. Secondly, the oxide trench in the drift region modulates the electric field distribution and reduces the cell pitch but still can maintain comparable breakdown voltage (BV). Simulation results show that the cell pitch of the DG LDMOS can be reduced by 50% in comparison with that of conventional LDMOS at the equivalent BV; Furthermore, R_on,sp of the DG LDMOS can be reduced by 67% due to the smaller cell pitch and the dual gate.