The conduction mechanism of stress induced leakage current through ultra-thin gate oxide under constant voltage stresses

The conduction mechanism of stress induced leakage current (SILC) through 2nm gate oxide is studied over a gate voltage range between 1.7V and stress voltage under constant voltage stress (CVS). The simulation results show that the SILC is formed by trap-assisted tunnelling (TAT) process which is dominated by oxide traps induced by high field stresses. Their energy levels obtained by this work are approximately 1.9eV from the oxide conduction band, and the traps are believed to be the oxygen-related donor-like defects induced by high field stresses. The dependence of the trap density on stress time and oxide electric field is also investigated.