Potential memory technologies for in-memory computing. (a)–(c) RRAM, PCM, and MTJ are collectively classified as resistive switch memory: (a) current–voltage characteristic and structure (inset) of an RRAM device;^[59] (b) schematic diagram of programming operation and device structure (inset)^[60] of PCM; (c) resistance–current characteristic and device structure (inset) of a magnetic tunnel junction. (d)–(f) Flash, FeFET, and SRAM are classified as charge-based memory: (d) transfer characteristic and device structure (inset) of a floating-gate field effect transistor; (e) polarization–voltage hysteretic characteristic and device structure (inset) of a ferroelectric field effect transistor; (f) static noise margin characteristic and unit structure (inset) of a static random access memory cell. (g) and (h) are classified as in situ memory, (g) the illustration of the subsystems within a three-dimensional integration chip nanosystem;^[37] (h) schematic diagram of a two-dimensional dual-gate transistor with an in situ floating gate.^[38] Panel (a) is reproduced from Ref. [59]. Panel (b) inset is reproduced from Ref. [60]. Panel (g) is reproduced from Ref. [37].