Negative gate bias stress effects on conduction and low frequency noise characteristics in p-type poly-Si thin-film transistors
Han Chao-Yang
1, 2, 3
, Liu Yuan
2, 3, †
, Liu Yu-Rong
1
, Chen Ya-Yi
1, 2, 3
, Wang Li
1, 2, 3
, Chen Rong-Sheng
1
Normalized
N
t
(defined as
N
t
_
after
/
N
t
_
initial
)
versus
negative gate bias voltage.