Negative gate bias stress effects on conduction and low frequency noise characteristics in p-type poly-Si thin-film transistors

Han Chao-Yang^{1, 2, 3}, Liu Yuan^{2, 3, †}, Liu Yu-Rong¹, Chen Ya-Yi^{1, 2, 3}, Wang Li^{1, 2, 3}, Chen Rong-Sheng¹

Variations of normalized hole field effect mobility and normalized sub-threshold swing in the poly-Si TFTs when stress voltage is −37 V.