Research on SEE mitigation techniques using back junction and p+ buffer layer in domestic non-DTI SiGe HBTs by TCAD
Plot of collector charge collection of back junction device versus Ln for P1 and P2.
Research on SEE mitigation techniques using back junction and p+ buffer layer in domestic non-DTI SiGe HBTs by TCAD |
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Plot of collector charge collection of back junction device versus Ln for P1 and P2. |
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