Physics-based analysis and simulation model of electromagnetic interference induced soft logic upset in CMOS inverter*

Project supported by the National Natural Science Foundation of China (Grant No. 60776034) and the Open Fund of Key Laboratory of Complex Electromagnetic Environment Science and Technology, China Academy of Engineering Physics (Grant No. 2015-0214.XY.K).

Liu Yu-Qian1, †, Chai Chang-Chun1, Zhang Yu-Hang2, Shi Chun-Lei1, Liu Yang1, Fan Qing-Yang1, Yang Yin-Tang1
       

Schematic diagram of the generation and transportation of non-equilibrium carriers in inverter’s PMOS during a whole interference period.