(color online) Device structure of the semiconductor quantum dot. Panels (a) and (b) are schematics of a double quantum dot fabricated using doped AlGaAs/GaAs heterostructure and undoped Si/SiGe herterostructure, respectively. is the current from source to drain through the dot, while is the current from source to drain through the QPC channel. The location of 2DEG and the electrons with spin directions in the double quantum dot are also shown. (c) Scanning electron micrograph (SEM) of a CMOS quantum dot with a SET as a charge sensor, where a white dash dotted line shows position of the cross section (d). Confinement gates (blue), lead gates (green), barrier gates (orange), and plunger gates (red) are shown. (d) Cross section of a CMOS quantum dot, dotted lines denote where 2DEG and a quantum dot form.