Positive gate bias stress-induced hump-effect in elevated-metal metal–oxide thin film transistors<xref rid="cpb_26_12_128101fn1" ref-type="fn">*</xref> <fn id="cpb_26_12_128101fn1"> <label>*</label> <p>Project supported by the Science and Technology Program of Suzhou City, China (Grant No. SYG201538) and the National Natural Science Foundation of China (Grant No. 61574096).</p> </fn>

Positive gate bias stress-induced hump-effect in elevated-metal metal–oxide thin film transistors* *

Project supported by the Science and Technology Program of Suzhou City, China (Grant No. SYG201538) and the National Natural Science Foundation of China (Grant No. 61574096).

Qi Dong-Yu, Zhang Dong-Li, Wang Ming-Xiang^†

(color online) (a) Plane view of the device composed of a main transistor and two edge parasitic transistors. (b) Positive charges trapping at the back-channel interface and/or into the passivation induce the transfer characteristic to negatively shift, while more positive charges trapped at the edges lead to the formation of the hump.