Positive gate bias stress-induced hump-effect in elevated-metal metal–oxide thin film transistors<xref rid="cpb_26_12_128101fn1" ref-type="fn">*</xref> <fn id="cpb_26_12_128101fn1"> <label>*</label> <p>Project supported by the Science and Technology Program of Suzhou City, China (Grant No. SYG201538) and the National Natural Science Foundation of China (Grant No. 61574096).</p> </fn>

Positive gate bias stress-induced hump-effect in elevated-metal metal–oxide thin film transistors* *

Project supported by the Science and Technology Program of Suzhou City, China (Grant No. SYG201538) and the National Natural Science Foundation of China (Grant No. 61574096).

Qi Dong-Yu, Zhang Dong-Li, Wang Ming-Xiang^†

(color online) Time evolutions of transfer characteristics under PBS with values of V_g stress of (a) 20 V, (b) 25 V, (c) 30 V at 20 °C. The TFTs have geometry W/L = 100/12 μm. (d) Voltage shift of V_H versus gate bias stress.