Near-interface oxide traps in 4H–SiC MOS structures fabricated with and without annealing in NO
Sun Qiu-Jie
1
, Zhang Yu-Ming
1
, Song Qing-Wen
1, †
, Tang Xiao-Yan
1, ‡
, Zhang Yi-Meng
1
, Li Cheng-Zhan
2
, Zhao Yan-Li
2
, Zhang Yi-Men
1
Hysteresis
C
–
V
curves of the SiC MOS capacitors at 100 kHz for N
2
and NO POA samples, respectively.