Horizontal InAs nanowire transistors grown on patterned silicon-on-insulator substrate

Zhang Wang^{1, 2}, Han Wei-Hua^{1, 2, †}, Zhao Xiao-Song^{1, 2}, Lv Qi-Feng^{1, 2}, Ji Xiang-Hai⁴, Yang Tao^{4, ‡}, Yang Fu-Hua^{1, 2, 3, §}

(color online) Room-temperature electrical performances. (a) Output curves with set varying from 1 V to 4 V, and the voltage spacing is 1 V. (b) Transfer characteristic with at 0.1, 0.2, 0.3, and 0.4 V, respectively. (c)–(e) Equivalent large signal circuit models of the transistor presenting orderly corresponding operation states: off regime, Ohmic regime, and saturation regime.