Analytical capacitance model for 14 nm FinFET considering dual-k spacer
Zheng Fang-Lin, Liu Cheng-Sheng, Ren Jia-Qi, Shi Yan-Ling, Sun Ya-Bin, Li Xiao-Jin †
       

(color online) (a) Snapshot of total simulation structure. (b) Equivalent schematic. (c) simulation structure. (d) Simulation structure of , , , , and .