A review for compact model of graphene field-effect transistors*

Project supported by the Opening Project of Key Laboratory of Microelectronics Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, the National Natural Science Foundation of China (Grant No. 61574166), the National Basic Research Program of China (Grant No. 2013CBA01604), the National Key Research and Development Program of China (Grant No. 2016YFA0201802), and the Beijing Training Project for the Leading Talents in S&T, China (Grant No. Z151100000315008).

Lu Nianduan 1 , 2 , 3 , Wang Lingfei 1 , 3 , Li Ling 1 , 2 , 3 , †, Liu Ming 1 , 2 , 3
       

(color online) (a) The output current under different gate voltages for the calculated and experimental results, and (b) transfer current under different drain voltages for the calculated and experimental results. Output current with simulated and experimental resutls under (c) nm and (d) nm.[47,48]